SH7059 Datasheet, PDF (836/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
Bit 5
EE
0
1
Description
Programming has ended normally
Programming has ended abnormally (programming result is not guaranteed)
• Bit 4—Flash Key Register Error Detect (FK): Returns the check result of the value of FKEY before the start of the
programming processing.
Bit 4
FK
Description
0
FKEY setting is normal (FKEY = H'A5)
1
FKEY setting is error (FKEY = value other than H'A5)
• Bit 3—Unused: Returns 0.
• Bit 2—Write Data Address Detect (WD): When an address in the flash memory area is specified as the start address of
the storage destination of the program data, an error occurs.
Bit 2
WD
Description
0
Setting of write data address is normal
1
Setting of write data address is abnormal
• Bit 1—Write Address Error Detect (WA): When the following items are specified as the start address of the
programming destination, an error occurs.
1. The programming destination address is an area other than flash memory
2. The specified address is not at the 128-byte boundary (A6 to A0 are not 0)
Bit 1
WA
0
1
Description
Setting of programming destination address is normal
Setting of programming destination address is abnormal
• Bit 0—Success/Fail (SF): Indicates whether the program processing has ended normally or not.
Bit 0
SF
Description
0
Programming has ended normally (no error)
1
Programming has ended abnormally (error occurs)
(4) Erasure Execution
When flash memory is erased, the erase-block number on the user MAT must be passed to the erasing program which
is downloaded. This is set to the FEBS parameter (general register R4).
One block is specified from the block number 0 to 15.
For details on the erasing procedure, see section 25.5.2, User Program Mode.
Rev.3.00 Mar. 12, 2008 Page 746 of 948
REJ09B0177-0300