SH7059 Datasheet, PDF (521/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Controller Area Network-II (HCAN-II)
Register Name Address
Bit
MBx[4], MBx[5]* H'104 + N • 32 5
Bit Name
CBE
4
CLE
3 to 0 DLC[3:0]
Note: * x/N: 0 to 31 (Indicates the mailbox number)
Description
CAN Bus Error
An external fault-tolerant CAN transceiver can be used together
with the HCAN module. If the error output pin of the transceiver
(normally active low) is connected to the CAN_NERR pin of this
LSI, the value of the CAN_NERR pin is stored into this bit at the
end of each transmission/reception (if the message is stored).
The inverted value of the CAN_NERR pin is set to this bit. If the
error output pin is active high, the setting value is not inverted.
When this bit is set, it indicates a potential physical error with the
CAN bus. As the CAN_NERR value is updated after the
transmission or reception in the corresponding mailbox, non-
interrupt is dedicated to this function but instead the normal
transmit end interrupt (IRR6) and normal receive end interrupt
(IRR2) should be considered.
Important: This function is not supported by this LSI. Thus the
write value should be 0. Values read out in the initial state are not
guaranteed.
Transmit Clear Enable
When this bit is set, message reception in the corresponding
mailbox cancels the wait messages in the transmission queue.
This action is notified by IRR8 and ABACK.
Important: This function is not supported by this LSI. Thus the
write value should be 0. Values read out in the initial state are not
guaranteed.
Data Length Code
Indicate the number of data bytes to be transmitted in a data
frame.
DLC[3:0] Data Length
0000 0 bytes
0001 1 byte
0010 2 bytes
0011 3 bytes
0100 4 bytes
0101 5 bytes
0110 6 bytes
0111 7 bytes
1xxx
8 bytes
Legend: x: Don't care
Rev.3.00 Mar. 12, 2008 Page 431 of 948
REJ09B0177-0300