SH7059 Datasheet, PDF (613/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

19. Multi-Trigger A/D Converter (MTAD)
• Bit 4—A/D Duty Flag B (ADDFxB): Indicates whether or not the ADDRxB and ADCNT values have matched.
Bit 4: ADDFxB
0
1
Note: x = 0 or 1.
Description
[Clearing condition]
When ADDFxB is read while set to 1, then 0 is written to ADDFxB
[Setting condition]
When ADCNTx and ADDRxB values have matched
(Initial value)
• Bit 3—A/D Duty Flag A (ADDFxA): Indicates whether or not the ADDRxA and ADCNT values have matched.
Bit 3: ADDFxA
0
1
Note: x = 0 or 1.
Description
[Clearing condition]
When ADDFxA is read while set to 1, then 0 is written to ADDFxA
[Setting condition]
When ADCNTx and ADDRxA values have matched
(Initial value)
• Bit 2—A/D Cycle Compare Match Flow Flag (ADCYLFx): Indicates whether or not the ADCYLRx and ADCNT
values have matched.
Bit 2: ADCYLFx
0
1
Note: x = 0 or 1.
Description
[Clearing condition]
When ADCYLFx is read while set to 1, then 0 is written to ADCYLFx
[Setting condition]
When ADCNTx and ADCYLRx values have matched
(Initial value)
• Bit 1—A/D Compare Match Flag (ADCMFxB): Indicates whether or not the ADGRxB and ADCNT values have
matched.
Bit 1: ADCMFxB
0
1
Note: x = 0 or 1.
Description
[Clearing condition]
When ADCMFxB is read while set to 1, then 0 is written to ADCMFxB
[Setting condition]
When ADCNTx and ADGRxB values have matched
(Initial value)
• Bit 0—A/D Compare Match Flag (ADCMFxA): Indicates whether or not the ADGRxA and ADCNT values have
matched.
Bit 0: ADCMFxA
0
1
Note: x = 0 or 1.
Description
[Clearing condition]
When ADCMFxA is read while set to 1, then 0 is written to ADCMFxA
[Setting condition]
When ADCNTx and ADGRxA values have matched
(Initial value)
Rev.3.00 Mar. 12, 2008 Page 523 of 948
REJ09B0177-0300