SH7059 Datasheet, PDF (458/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

15. Serial Communication Interface (SCI)
Table 15.4 Bit Rates and BRR Settings in Synchronous Mode
Pφ (MHz)
Bit Rate
10
12
16
(Bits/s)
n
N
n
N
n
N
n
250
–
–
3
187
3
249
500
–
–
3
93
3
124
–
1k
–
–
2
187
2
249
–
2.5 k
1
249
2
74
2
99
2
5k
1
124
1
149
1
199
2
10 k
0
249
1
74
1
99
1
25 k
0
99
0
119
0
159
1
50 k
0
49
0
59
0
79
0
100 k
0
24
0
29
0
39
0
250 k
0
9
0
11
0
15
0
500 k
0
4
0
5
0
7
0
1M
0
2
0
3
0
2.5 M
0
0*
0
0*
–
–
0
5M
0
Legend:
Blank:No setting available
–:Setting possible, but error occurs
*:Continuous transmission/reception not possible
Note: Settings with an error of 1% or less are recommended.
The BRR setting is calculated as follows:
Asynchronous mode:
N=
Pφ
× 10⁶ – 1
64 × 2^2n–1 × B
Synchronous mode:
N=
P_φ
× 10⁶ – 1
8 × 2^2n–1 × B
B:
Bit rate (bits/s)
N:
Baud rate generator BRR setting (0 ≤ N ≤ 255)
Pf:
Peripheral module operating frequency (MHz) (1/2 of system clock)
n:
Baud rate generator input clock (n = 0 to 3)
(See the following table for the clock sources and value of n.)
n
Clock Source
0
Pφ
1
Pφ/4
2
Pφ/16
3
Pφ/64
CKS1
0
0
1
1
SMR Settings
CKS2
0
1
0
1
Rev.3.00 Mar. 12, 2008 Page 368 of 948
REJ09B0177-0300
20
N
–
–
124
249
124
199
99
49
19
9
4
1
0*