SH7059 Datasheet, PDF (656/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

21. Advanced User Debugger (AUD)
21.2 Pin Configuration
Table 21.1 shows the AUD's input/output pins.
Table 21.1 AUD Pins
Name
AUD data
AUD reset
AUD mode
AUD clock
AUD sync signal
Function
Abbreviation
Branch Trace Mode
RAM Monitor Mode
AUDATA3–AUDATA0 Branch destination address output Monitor address/data input/output
AUDRST
AUD reset input
AUD reset input
AUDMD
Mode select input (L)
Mode select input (H)
AUDCK
AUDSYNC
Serial clock (Pφ) output
Data start position identification
signal output
Serial clock input
Data start position identification
signal input
21.2.1 Pin Descriptions
Pins Used in Both Modes
Pin
AUDMD
AUDRST
Description
The mode is selected by changing the input level at this pin.
Low: Branch trace mode
High: RAM monitor mode
The input at this pin should be changed when AUDRST is low. When no connection is made,
this pin is pulled up internally.
The AUD's internal buffers and logic are initialized by inputting a low level to this pin. When
this signal goes low, the AUD enters the reset state and the AUD's internal buffers and logic
are reset. When AUDRST goes high again after the AUDMD level settles, the AUD starts
operating in the selected mode. When no connection is made, this pin is pulled down
internally.
Rev.3.00 Mar. 12, 2008 Page 566 of 948
REJ09B0177-0300