SH7059 Datasheet, PDF (860/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
25.8.2 Interrupts during Programming/Erasing
(1) Download of On-Chip Program
(1.1) VBR setting change
Before downloading the on-chip program, VBR must be set to H'00000000 (initial value). If VBR is set to a value
other than the initial value, the interrupt vector table is placed in the user MAT (FMATS is not H'AA) or the user boot
MAT (FMATS is H'AA) on initialization of VBR.
When VBR setting change conflicts with interrupt occurrence, whether the vector table before or after VBR is changed
is referenced may cause an error.
Therefore, for cases where VBR setting change may conflict with interrupt occurrence, prepare a vector table to be
referenced when VBR is H'00000000 at the start of the user MAT or user boot MAT.
(1.2) SCO download request and interrupt request
Download of the on-chip programming/erasing program that is initiated by setting the SCO bit in FCCS to 1 generates
a particular interrupt processing accompanied by MAT switchover. Operation when the SCO download request and
interrupt request conflicts is described below.
1. Contention between SCO download request and interrupt request
Figure 25.21 shows the timing of contention between execution of the instruction that sets the SCO bit in FCCS to
1 and interrupt acceptance.
CPU cycle
CPU operation for instruction
that sets SCO bit to 1
n
Fetch
n+1
Decoding
n+2
Execution
n+3
Execution
n+4
Execution
Interrupt acceptance
(a)
(b)
(c)
(a) When the interrupt is accepted at or before the (n + 1) cycle
After the interrupt processing completes, the SCO bit is set to 1 and download is executed.
(b) When the interrupt is accepted at the (n + 2) cycle
The interrupt conflicts with the SCO download request. For details on operation in this case, see
2. Operation when contention occurs.
(c) When the interrupt is accepted at or after the (N + 3) cycle
The SCO download request occurs prior to the interrupt request, and download is executed.
During download, no other interrupt processing can be handled. If an interrupt is still being
requested after download completes, the interrupt processing starts. For details on interrupt
requests during download, see 3. Interrupt requests generated during download.
Figure 25.21 Timing of Contention between SCO Download Request and Interrupt Request
2. Operation when contention occurs
Operation differs according to the type of interrupt with which the SCO download request has conflicted.
⎯ NMI, UBC, and H-UDI interrupt requests
Operation for when these interrupts conflict with the SCO download request is described below.
Rev.3.00 Mar. 12, 2008 Page 770 of 948
REJ09B0177-0300