SH7059 Datasheet, PDF (486/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

15. Serial Communication Interface (SCI)
From the equation above, if F = 0 and D = 0.5 the receive margin is 46.875%:
D = 0.5, F = 0
M = (0.5 − 1/(2 × 16)) × 100%
= 46.875%
This is a theoretical value. A reasonable margin to allow in system designs is 20–30%.
15.5.7 Constraints on DMAC Use
• When using an external clock source for the serial clock, update TDR with the DMAC, and then after the elapse of five
peripheral clocks (Pφ) or more, input a transmit clock. If a transmit clock is input in the first four Pφ clocks after TDR
is written, an error may occur (figure 15.25).
• Before reading the receive data register (RDR) with the DMAC, select the receive-data-full (RXI) interrupt of the SCI
as a start-up source.
SCK
t
TDRE
D0
D1
D2
D3
D4
D5
D6
D7
Note: During external clock operation, an error may occur if t is 4 Pφ clocks or less.
Figure 15.25 Example of Synchronous Transmission with DMAC
15.5.8 Cautions on Synchronous External Clock Mode
• Set TE = RE = 1 only when external clock SCK is 1.
• Do not set TE = RE = 1 until at least four Pφ clocks after external clock SCK has changed from 0 to 1.
• When receiving, RDRF is 1 when RE is cleared to zero 2.5–3.5 Pφ clocks after the rising edge of the RxD D7 bit SCK
input, but copying to RDR is not possible.
15.5.9 Caution on Synchronous Internal Clock Mode
When receiving, RDRF is 1 when RE is cleared to zero 1.5 Pφ clocks after the rising edge of the RxD D7 bit SCK output,
but copying to RDR is not possible.
15.5.10 Note on Writing to Registers During Transmit, Receive, and Transmit/Receive Operations
Do not write to SMR, SCR, BRR, or SDCR after setting the TE or RE bit in SCR to 1 to start a transmit, receive, or
transmit/receive operation. Also, do not overwrite the contents of these registers with identical values. However, the above
restriction does not apply to a write operation to clear the TE or RE bit in SCR to 0 at the end of a transmit, receive, or
transmit/receive operation.
Read operations are always possible.
Rev.3.00 Mar. 12, 2008 Page 396 of 948
REJ09B0177-0300