SH7059 Datasheet, PDF (530/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Controller Area Network-II (HCAN-II)
Bit
Bit Name Initial Value R/W Description
0
MCR0
1
R/W Reset Request
Controls resetting of the HCAN module. After detecting a reset request, the
HCAN controller enters its reset routine, re-initializes the internal logic, and
then set GSR3 and IRR0 to notify reset mode. Then the HCAN enters reset
mode. During re-initialization, all the registers are cleared.
This bit has to be cleared by writing a 0 to join the CAN bus. After this bit is
cleared, the HCAN needs to be re-configured, waits until it detects 11
recessive bits, and then joins the CAN bus.
After a power-on reset, this bit and GSR3 are always set. This means that a
reset request has been made and the HCAN is in re-configuration mode.
0: CAN interface normal operating mode (MCR0 = 0 and GSR3 = 0)
Setting condition: When 0 is written after an HCAN reset
1: Reset mode transition request of CAN interface
17.4.3 General Status Register_n (GSR_n) (n = 0, 1)
The general status register (GSR) is a 16-bit read-only register that indicates the status of the HCAN.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
GSR5 GSR4 GSR3 GSR2 GSR1 GSR0
Initial Value: 0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
R/W: ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
R
R
R
R
R
R
Bit
Bit Name
15 to 6 —
5
GSR5
4
GSR4
Initial Value R/W
0
⎯
0
R
0
R
Description
Reserved
The write value should be 0. The read value is not guaranteed.
Error Passive Status
Indicates whether the CAN interface is error passive or not. This bit is set as
soon as the HCAN enters the error passive state and is cleared when the
module enters again the error active state. This means that this bit will
remain high during error passive and during bus off. Thus to find out the
correct state, both GSR5 and GRS0 must be considered.
0: HCAN is not error passive
Setting condition: HCAN is in error active state
1: HCAN is error passive (if GSR0 = 0)
Setting condition: When TEC ≥ 128 or REC ≥ 128
Halt/Sleep Status
Indicates whether the CAN interface is in the halt/sleep state or not.
0: HCAN is not in the halt state nor sleep state
1: Halt mode (if MCR1 = 1) or sleep mode
(if MCR5 = 1)
Setting condition: If MCR1 is set and the CAN bus is either in intermission
or idle state
Rev.3.00 Mar. 12, 2008 Page 440 of 948
REJ09B0177-0300