SH7059 Datasheet, PDF (325/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
• Bit 2—Cycle Register Compare-Match Interrupt Enable 6C/7C (CME6C/CME7C): Enables or disables interrupt
requests by CMFxC in TSR6 or TSR7 when CMFxC is set to 1. Setting the DMAC while interrupt requests are
enabled allows the DMAC to be activated by an interrupt request.
Bit 2: CMExC
0
1
Note: x = 6 or 7
Description
CMIxC interrupt requested by CMFxC is disabled
CMIxC interrupt requested by CMFxC is enabled
(Initial value)
• Bit 1—Cycle Register Compare-Match Interrupt Enable 6B/7B (CME6B/CME7B): Enables or disables interrupt
requests by CMFxB in TSR6 or TSR7 when CMFxB is set to 1. Setting the DMAC while interrupt requests are
enabled allows the DMAC to be activated by an interrupt request.
Bit 1: CMExB
0
1
Note: x = 6 or 7
Description
CMIxB interrupt requested by CMFxB is disabled
CMIxB interrupt requested by CMFxB is enabled
(Initial value)
• Bit 0—Cycle Register Compare-Match Interrupt Enable 6A/7A (CME6A/CME7A): Enables or disables interrupt
requests by CMFxA in TSR6 or TSR7 when CMFxA is set to 1. Setting the DMAC while interrupt requests are
enabled allows the DMAC to be activated by an interrupt request.
Bit 0: CMExA
0
1
Note: x = 6 or 7
Description
CMIxA interrupt requested by CMFxA is disabled
CMIxA interrupt requested by CMFxA is enabled
(Initial value)
Timer Interrupt Enable Register 8 (TIER8)
TIER8 controls enabling/disabling of channel 8 one-shot pulse interrupt requests.
Bit:
Initial value:
R/W:
15
OSE8P
0
R/W
14
OSE8O
0
R/W
13
OSE8N
0
R/W
12
OSE8M
0
R/W
11
OSE8L
0
R/W
10
OSE8K
0
R/W
9
OSE8J
0
R/W
8
OSE8I
0
R/W
Bit:
Initial value:
R/W:
7
OSE8H
0
R/W
6
OSE8G
0
R/W
5
OSE8F
0
R/W
4
OSE8E
0
R/W
3
OSE8D
0
R/W
2
OSE8C
0
R/W
1
OSE8B
0
R/W
0
OSE8A
0
R/W
• Bit 15—One-Shot Pulse Interrupt Enable 8P (OSE8P): Enables or disables interrupt requests by OSF8P in TSR8 when
OSF8P is set to 1.
Bit 15: OSE8P
0
1
Description
OSI8P interrupt requested by OSF8P is disabled
OSI8P interrupt requested by OSF8P is enabled
(Initial value)
Rev.3.00 Mar. 12, 2008 Page 235 of 948
REJ09B0177-0300