SH7059 Datasheet, PDF (105/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

1. Overview
Type
Symbol
User break
UBCTRG
controller (UBC)
High-performance TCK
user debug
interface
TMS
(H-UDI)
TDI
TDO
Advanced
user debugger
(AUD)
TRST
AUDATA0–
AUDATA3
AUDRST
AUDMD
AUDCK
AUDSYNC
I/O ports
POD
PA0–PA15
PB0–PB15
Pin No.
FP-256H
BP-272
I/O Name
Function
159
W12
Output User break UBC condition match trigger output pin.
trigger output
236
J2
Input Test clock
Test clock input pin.
232
K3
Input Test mode
select
Test mode select signal input pin.
234
K4
Input Test data input Instruction/data serial input pin.
235
H1
Output Test data
output
Instruction/data serial output pin.
233
J1
Input Test reset
Initialization signal input pin.
241–244
G1, F1, G2, E1 Input/ AUD data
output
Branch trace mode: Branch destination
address output pins.
RAM monitor mode: Monitor address
input / data input/output pins.
238
H2
Input AUD reset Reset signal input pin.
240
H3
Input AUD mode
Mode select signal input pin.
Branch trace mode: Low
RAM monitor mode: High
245
D1
Input/ AUD clock
output
Branch trace mode: Serial clock output
pin.
RAM monitor mode: Serial clock input
pin.
246
F2
Input/ AUD
Branch trace mode: Data start position
output synchronization identification signal output pin.
signal
RAM monitor mode: Data start position
identification signal input pin.
34
C10
Input Port output Input pin for port pin drive control when
disable
general port is set for output.
125, 127, 129–
138, 140, 142–
144
U18, T17, V20,
V19, W20, V18,
W19, Y19, W18,
U17, Y18, V17,
W17, W16, Y17,
Y16
Input/ Port A
output
General input/output port pins.
Input or output can be specified bit by bit.
145–147, 149, U15, W15, Y15,
151–160, 162, 164Y14, U14, V14,
W14, Y13, W13,
U13, V13, V12,
W12, Y12, Y10,
U12
Input/ Port B
output
General input/output port pins.
Input or output can be specified bit by bit.
Rev.3.00 Mar. 12, 2008 Page 15 of 948
REJ09B0177-0300