SH7059 Datasheet, PDF (128/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

2. CPU
Classification
Shift
Types
10
Branch
9
System control 11
Operation Code Function
ROTL
One-bit left rotation
ROTR
One-bit right rotation
ROTCL
One-bit left rotation with T bit
ROTCR
One-bit right rotation with T bit
SHAL
One-bit arithmetic left shift
SHAR
One-bit arithmetic right shift
SHLL
One-bit logical left shift
SHLLn
n-bit logical left shift
SHLR
One-bit logical right shift
SHLRn
n-bit logical right shift
BF
Conditional branch, conditional branch with delay
(Branch when T = 0)
BT
Conditional branch, conditional branch with delay
(Branch when T = 1)
BRA
Unconditional branch
BRAF
Unconditional branch
BSR
Branch to subroutine procedure
BSRF
Branch to subroutine procedure
JMP
Unconditional branch
JSR
Branch to subroutine procedure
RTS
Return from subroutine procedure
CLRT
T bit clear
CLRMAC
MAC register clear
LDC
Load to control register
LDS
Load to system register
NOP
No operation
RTE
Return from exception processing
SETT
T bit set
SLEEP
Transition to power-down mode
STC
Store control register data
STS
Store system register data
TRAPA
Trap exception handling
No. of
Instructions
14
11
31
Rev.3.00 Mar. 12, 2008 Page 38 of 948
REJ09B0177-0300