SH7059 Datasheet, PDF (753/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. ROM (SH7058S)
(4.1) Flash erase block select parameter (FEBS: general register R4 of CPU)
This parameter specifies the erase-block number. Several block numbers cannot be specified.
Bit :
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
Bit :
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
Bit :
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
Bit :
7
6
5
4
3
2
1
0
EBS7 EBS6 EBS5 EBS4 EBS3 EBS2 EBS1 EBS0
• Bits 31 to 8—Unused: Return 0.
• Bits 7 to 0—Erase Block (EB7 to EB0): Set the erase-block number in the range from 0 to 15. 0 corresponds to the
EB0 block and 15 corresponds to the EB15 block. An error occurs when a number other than 0 to 15 (H'00 to H'0F) is
set.
(4.2) Flash pass/fail result parameter (FPFR: general register R0 of CPU)
This parameter returns the value of the erasing processing result.
Bit :
31
30
29
28
27
26
25
24
0
0
0
0
0
0
0
0
Bit :
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
Bit :
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
Bit :
7
6
5
4
3
2
0
MD
EE
FK
EB
0
1
0
0
SF
• Bits 31 to 7—Unused: Return 0.
• Bit 6—Erasure Mode Related Setting Error Detect (MD): Returns the check result of whether the signal input to the
FWE pin is high and whether the error protection state is entered.
When a low-level signal is input to the FWE pin or the error protection state is entered, 1 is written to this bit. The input
level to the FWE pin and the error protection state can be confirmed with the FWE bit (bit 7) and the FLER bit (bit 4) in
FCCS, respectively. For conditions to enter the error protection state, see section 24.6.3, Error Protection.
Bit 6
MD
0
1
Description
FWE and FLER settings are normal (FWE = 1, FLER = 0)
FWE = 0 or FLER = 1, and erasure cannot be performed
• Bit 5—Erasure Execution Error Detect (EE): 1 is returned to this bit when the user MAT could not be erased or when
flash-memory related register settings are partially changed on returning from the user branch processing.
If this bit is set to 1, there is a high possibility that the user MAT is partially erased. In this case, after removing the error
factor, erase the user MAT.
Rev.3.00 Mar. 12, 2008 Page 663 of 948
REJ09B0177-0300