SH7059 Datasheet, PDF (307/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
• Bit 5—Count-Up/Count-Down Flag 6B (UD6B): Status flag that indicates the TCNT6B count operation.
Bit 5: UD6B
0
1
Description
Free-running counter TCNT6B operates as an up-counter
Free-running counter TCNT6B operates as a down-counter
• Bit 4—Count-Up/Count-Down Flag 6A (UD6A): Status flag that indicates the TCNT6A count operation.
Bit 4: UD6A
0
1
Description
Free-running counter TCNT6A operates as an up-counter
Free-running counter TCNT6A operates as a down-counter
• Bit 3—Cycle Register Compare-Match Flag 6D/7D (CMF6D/CMF7D): Status flag that indicates CYLRxD compare-
match.
Bit 3: CMFxD
0
1
Note: x = 6 or 7
Description
[Clearing condition]
When CMFxD is read while set to 1, then 0 is written to CMFxD
(Initial value)
[Setting conditions]
• When TCNTxD = CYLRxD (in non-complementary PWM mode)
• When TCNT6D = H'0000 in a down-count (in complementary PWM mode)
• Bit 2—Cycle Register Compare-Match Flag 6C/7C (CMF6C/CMF7C): Status flag that indicates CYLRxC compare-
match.
Bit 2: CMFxC
0
1
Note: x = 6 or 7
Description
[Clearing condition]
When CMFxC is read while set to 1, then 0 is written to CMFxC
(Initial value)
[Setting conditions]
• When TCNTxC = CYLRxC (in non-complementary PWM mode)
• When TCNT6C = H'0000 in a down-count (in complementary PWM mode)
• Bit 1—Cycle Register Compare-Match Flag 6B/7B (CMF6B/CMF7B): Status flag that indicates CYLRxB compare-
match.
Bit 1: CMFxB
0
1
Note: x = 6 or 7
Description
[Clearing condition]
When CMFxB is read while set to 1, then 0 is written to CMFxB
(Initial value)
[Setting conditions]
• When TCNTxB = CYLRxB (in non-complementary PWM mode)
• When TCNT6B = H'0000 in a down-count (in complementary PWM mode)
Rev.3.00 Mar. 12, 2008 Page 217 of 948
REJ09B0177-0300