SH7059 Datasheet, PDF (357/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
11.2.22 Cycle Registers (CYLR)
The cycle registers (CYLR) are 16-bit registers. The ATU-II has eight cycle registers, four each in channels 6 and 7.
Channel
6
7
Abbreviation
CYLR6A– CYLR6D
CYLR7A– CYLR7D
Function
16-bit PWM cycle registers
Cycle Registers (CYLR6A to CYLR6D, CYLR7A to CYLR7D)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The CYLR registers are 16-bit readable/writable registers used for PWM cycle storage.
The CYLR value is constantly compared with the corresponding free-running counter (TCNT6A to TCNT6D, TCNT7A to
TCNT7D) value, and when the two values match, the corresponding timer start register (TSR) bit (CMF6A to CMF6D,
CMF7A to CMF7D) is set to 1, and the free-running counter (TCNT6A to TCNT6D, TCNT7A to TCNT7D) is cleared. At
the same time, the buffer register (BFR) value is transferred to the duty register (DTR). The corresponding output pins
(TO6A to TO6D, TO7A to TO7D) go to 0 output when the BFR value is H'0000. In other cases, they go to 1 output.
The CYLR registers can only be accessed by a word read or write.
The CYLR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode and software standby
mode.
For details of the CYLR, BFR, and DTR registers, see section 11.3.9, PWM Timer Function.
11.2.23 Buffer Registers (BFR)
The buffer registers (BFR) are 16-bit registers. The ATU-II has eight buffer registers, four each in channels 6 and 7.
Channel
6
7
Abbreviation
BFR6A–BFR6D
BFR7A–BFR7D
Function
16-bit PWM buffer registers
Buffer register (BFR) value is transferred to duty register (DTR) on compare-match of
corresponding cycle register (CYLR)
Buffer Registers (BFR6A to BFR6D, BFR7A to BFR7D)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The BFR registers are 16-bit readable/writable registers that store the value to be transferred to the duty register (DTR) in
the event of a cycle register (CYLR) compare-match.
The BFR registers can only be accessed by a word read or write.
Rev.3.00 Mar. 12, 2008 Page 267 of 948
REJ09B0177-0300