SH7059 Datasheet, PDF (33/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Differences between SH7058 and SH7058S/SH7059
SH7058 (Rev.3, REJ09B0046-0300H)
21.3.6 Port C IO Register (PCIOR)
757
PCIOR is enabled when port C pins function as general
input/output pins (PC4 to PC0), and disabled otherwise.
When port C pins function as PC4 to PC0, a pin becomes
an output when the corresponding bit in PCIOR is set to 1,
and an input when the bit is cleared to 0.
PCIOR is initialized to H'0000 by a power-on reset
(excluding a WDT power-on reset), and in hardware
standby mode. It is not initialized in software standby mode
or sleep mode.
21.3.7 Port C Control Register (PCCR)
758
Bit: 7
6
5
4
— PC3MD — PC2MD
Initial value: 0
0
0
0
R/W: R
R/W
R
R/W
0
PC0MD
0
R/W
SH7058S/SH7059
22.3.6 Port C IO Register (PCIOR)
Description amended
PCIOR is enabled when port C pins function as general
input/output pins (PC4 to PC0 or transmit/receive
input/output for the SSU (SSI1 and SSO1)), and disabled
otherwise.
When port C pins function as PC4 to PC0 or
transmit/receive input/output for the SSU (SSI1 and SSO1),
a pin becomes an output when the corresponding bit in
PCIOR is set to 1, and an input when the bit is cleared to 0.
PCIOR is initialized to H'0000 by a power-on reset
(excluding a WDT power-on reset), in hardware standby
mode, and in software standby mode. It is not initialized in
sleep mode.
22.3.7 Port C Control Register (PCCR)
Bit table amended
Bit: 7
6
5
4
PC3MD1 PC3MD0 PC2MD1 PC2MD0
Initial value: 0
0
0
0
R/W: R/W R/W R/W R/W
0
PC0MD
0
R/W
PCCR is initialized to H'0000 by a power-on reset
(excluding a WDT power-on reset), and in hardware
standby mode. It is not initialized in software standby mode
or sleep mode.
Description amended
PCCR is initialized to H'0000 by a power-on reset
(excluding a WDT power-on reset), in hardware standby
mode, and software standby mode. It is not initialized in .
sleep mode.
• Bit 7—Reserved: This bit is always read as 0. The write
value should always be 0.
• Bit 6—PC3 Mode Bit (PC3MD): Selects the function of
pin PC3/RxD2.
Bit 6: PC3MD
0
1
Description
General input/output (PC3)
Receive data input (RxD2)
(Initial value)
• Bits 7 and 6—PC3 Mode Bit 1, 0 (PC3MD1, PC3MD0):
Selects the function of pin PC3/RxD2/SSI1.
Bit 7: PC3MD1
0
1
Bit 6: PC3MD0
0
1
0
1
Description
General input/output (PC3)
Receive data input (RxD2)
Receive data input (SSI1)
Reserved (Do not set)
(Initial value)
• Bit 5—Reserved: This bit is always read as 0. The write
value should always be 0.
• Bit 4—PC2 Mode Bit (PC2MD): Selects the function of
pin PC2/TxD2.
Bit 4: PC2MD
0
1
Description
General input/output (PC2)
Transmit data output (TxD2)
(Initial value)
• Bits 5 and 4—PC2 Mode Bit 1,0 (PC2MD1, PC2MD0):
Selects the function of pin PC2/TxD2/SSO1.
Bit 5: PC2MD1
0
1
Bit 4: PC2MD0
0
1
0
1
Description
General input/output (PC2)
Transmit data output (TxD2)
Transmit data output (SSO1)
Reserved (Do not set)
(Initial value)
21.3.8 Port D IO Register (PDIOR)
759
PDIOR is initialized to H'0000 by a power-on reset
(excluding a WDT power-on reset), and in hardware
standby mode. It is not initialized in software standby mode
or sleep mode.
22.3.8 Port D IO Register (PDIOR)
Description amended
PDIOR is initialized to H'0000 by a power-on reset
(excluding a WDT power-on reset), in hardware standby
mode, and in software standby mode. It is not initialized .
sleep mode.
Rev.3.00 Mar. 12, 2008 Page xxxiii of xc
REJ09B0177-0300