SH7059 Datasheet, PDF (730/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

23. I/O Ports (I/O)
23.12 Port L
Port L is an input/output port with the 14 pins shown in figure 23.11.
Port L
PL13 (I/O) /IRQOUT (output) /SCS1 (I/O)
PL12 (I/O) /IRQ4 (input) /SCS0 (I/O)
PL11 (I/O) /HRxD0 (input) /HRxD1 (input)
PL10 (I/O) /HTxD0 (output) /HTxD1 (output)
PL9 (I/O) /SCK4 (I/O) /IRQ5 (input)
PL8 (I/O) /SCK3 (I/O)
PL7 (I/O) /SCK2 (I/O) /SSCK1 (output)
PL6 (I/O) /ADEND (output)
PL5 (I/O) /ADTRG1 (input)
PL4 (I/O) /ADTRG0 (input)
PL3 (I/O) /TCLKB (I/O)
PL2 (I/O) /TIO11B (I/O) /IRQ7 (input)
PL1 (I/O) /TIO11A (I/O) /IRQ6 (input)
PL0 (I/O) /TI10 (input)
Figure 23.11 Port L
23.12.1 Register Configuration
The port L register configuration is shown in table 23.21.
Table 23.21 Register Configuration
Name
Abbreviation
R/W
Port L data register
PLDR
R/W
Port L port register
PLPR
R
Initial Value
H'0000
Port L pin values
Address
H'FFFFF75E
H'FFFFF788
Access Size
8, 16
8, 16
23.12.2 Port L Data Register (PLDR)
Bit: 15
—
Initial value: 0
R/W: R
14
13
12
11
10
9
8
—
PL13 PL12 PL11 PL10 PL9
PL8
DR
DR
DR
DR
DR
DR
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PL7
PL6
PL5
PL4
PL3
PL2
PL1
PL0
DR
DR
DR
DR
DR
DR
DR
DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Rev.3.00 Mar. 12, 2008 Page 640 of 948
REJ09B0177-0300