SH7059 Datasheet, PDF (358/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
The BFR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode and software standby
mode.
11.2.24 Duty Registers (DTR)
The duty registers (DTR) are 16-bit registers. The ATU-II has eight duty registers, four each in channels 6 and 7.
Channel
6
7
Abbreviation
DTR6A–DTR6D
DTR7A–DTR7D
Function
16-bit PWM duty registers
Duty Registers (DTR6A to DTR6D, DTR7A to DTR7D)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The DTR registers are 16-bit readable/writable registers used for PWM duty storage.
The DTR value is constantly compared with the corresponding free-running counter (TCNT6A to TCNT6D, TCNT7A to
TCNT7D) value, and when the two values match, the corresponding channel output pin (TO6A to TO6D, TO7A to TO7D)
goes to 0 output. Also, when CYLR and the corresponding the free-running counter match, the corresponding BFR value
is loaded. Set a value in the range 0 to CYLR for DTR; do not set a value greater than CYLR.
The DTR registers can only be accessed by a word read or write.
The DTR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode and software standby
mode.
11.2.25 Reload Register (RLDR)
The reload register is a 16-bit register. The ATU-II has one RLDR register in channel 8.
Reload Register 8 (RLDR8)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
RLDR8 is a 16-bit readable/writable register. When reload is enabled (by a setting in RLDENR) and DSTR8I to DSTR8P
are set to 1 by the channel 2 compare-match signal one-shot pulse start trigger, the reload register value is transferred to
DCNT8I to DCNT8P before the down-count is started. The reload register value is not transferred when the one-shot pulse
function is used independently, without linkage to channel 2, or when down-counters DCNT8I to DCNT8P are running.
RLDR8 can only be accessed by a word read or write.
RLDR is initialized to H'0000 by a power-on reset, and in hardware standby mode and software standby mode.
Rev.3.00 Mar. 12, 2008 Page 268 of 948
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