SH7059 Datasheet, PDF (903/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 27 Power-Down State
27. Power-Down State
27.1 Overview
Three modes are provided as power-save modes, namely, the hardware standby, software standby and sleep modes. Also,
a module standby function is available to stop some modules. These standby modes can be selected depending on
applications to reduce the power consumption of this LSI.
27.1.1 Power-Down States
The power-down state is effected by the following modes:
1. Hardware standby mode
A transition to hardware standby mode is made according to the input level of the RES and HSTBY pins.
In hardware standby mode, all this LSI functions are halted and the power supply to most circuits of this LSI is
stopped.
This state is exited by means of a power-on reset.
2. Software standby mode
A transition to software standby mode is made by means of software (a CPU instruction).
In software standby mode, all this LSI functions are halted and the power supply to most circuits of this LSI is stopped.
This state is canceled by a power-on reset or a rising edge of the NMI signal.
3. Sleep mode
A transition to sleep mode is made by means of a CPU instruction.
In software standby mode, basically only the CPU is halted, and all on-chip peripheral modules operate.
This state is exited by means of a power-on reset, a manual reset, interrupt, or DMA address error.
4. Module standby mode
Operation of the on-chip peripheral modules* which can be placed in a standby mode can be stopped by stopping the
clock supply. Clock supply to the individual modules can be controlled by setting bits in system control register 2
(SYSCR2).
Note: * AUD, H-UDI, FPU, and UBC
Rev.3.00 Mar. 12, 2008 Page 813 of 948
REJ09B0177-0300