SH7059 Datasheet, PDF (250/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
Item
Channels 6, 7
Channel 8
Channel 9
Channel 10
Channel 11
Counter
Clock sources (Pφ–Pφ/32) × (1/2ⁿ) (Pφ–Pφ/32) × (1/2ⁿ) —
configuration
(n = 0–5)
(n = 0–5)
(Pφ–Pφ/32)
(Pφ–Pφ/32) × (1/2ⁿ)
(n = 0-5)
TCLKA, TCLKB
Counters
TCNT6A–D,
TCNT7A–D
DCNT8A–P
ECNT9A–F
TCNT10AH,
TCNT10AL,
TCNT10B–H
TCNT11
General
—
—
—
—
GR11A, GR11B
registers
Dedicated input —
—
—
ICR10AH, ICR10AL —
capture
Dedicated
—
—
GR9A–F
GR10G, OCR/0AH, —
output compare
OCR/0AL, OCR/0B,
NCR10, TCCLR10
PWM output CYLR6A–D,
—
—
—
—
CYLR7A–D,
DTR6A–D,
DTR7A–D,
BFR6A–D,
BFR7A–D
Input pins
—
—
TI9A–F
TI10
—
I/O pins
—
—
—
—
TIO11A, TIO11B
Output pins
TO6A–D,
TO8A–P
—
—
—
TO7A–D
Counter clearing function
O
—
O
O
—
Interrupt sources
8 sources
16 sources
6 sources
3 sources
3 sources
Compare-match × 8 Underflow × 16
Compare-match × 6 Compare-match × 2, Dual input
dual input
capture/compare-
capture/compare- match × 2, overflow ×
match × 1
1
Inter-channel and inter-module DMAC activation
connection signals
compare-match
signal output
Channel 1 and 2 Compare-match Compare-match Compare-match
compare-match signal channel 3 signal channel 0 signal output to APC
signal trigger input to capture trigger outputcapture trigger output
one-shot pulse
output down-counter
Channel 1 and 2
counter clear output
Legend:
O: Available
—: Not available
Rev.3.00 Mar. 12, 2008 Page 160 of 948
REJ09B0177-0300