SH7059 Datasheet, PDF (312/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
• Bit 3—Compare-Match Flag 9D (CMF9D): Status flag that indicates GR9D compare-match.
Bit 3: CMF9D
0
1
Description
[Clearing condition]
When CMF9D is read while set to 1, then 0 is written to CMF9D
[Setting condition]
When the next edge is input while ECNT9D = GR9D
(Initial value)
• Bit 2—Compare-Match Flag 9C (CMF9C): Status flag that indicates GR9C compare-match.
Bit 2: CMF9C
0
1
Description
[Clearing condition]
When CMF9C is read while set to 1, then 0 is written to CMF9C
[Setting condition]
When the next edge is input while ECNT9C = GR9C
(Initial value)
• Bit 1—Compare-Match Flag 9B (CMF9B): Status flag that indicates GR9B compare-match.
Bit 1: CMF9B
0
1
Description
[Clearing condition]
When CMF9B is read while set to 1, then 0 is written to CMF9B
[Setting condition]
When the next edge is input while ECNT9B = GR9B
(Initial value)
• Bit 0—Compare-Match Flag 9A (CMF9A): Status flag that indicates GR9A compare-match.
Bit 0: CMF9A
0
1
Description
[Clearing condition]
When CMF9A is read while set to 1, then 0 is written to CMF9A
[Setting condition]
When the next edge is input while ECNT9A = GR9A
(Initial value)
Timer Status Register 11 (TSR11)
TSR11 indicates the status of channel 11 input capture, compare-match, and overflow.
Bit:
15
14
13
12
11
10
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
9
8
—
OVF11
0
0
R
R/(W)*
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
IMF11B IMF11A
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R/(W)*
R/(W)*
Note: * Only 0 can be written to clear the flag.
Rev.3.00 Mar. 12, 2008 Page 222 of 948
REJ09B0177-0300