SH7059 Datasheet, PDF (863/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
Table 25.11 User Branch Processing Intervals
Processing Name
Maximum Interval
Minimum Interval
Programming
Approximately 1 ms
Approximately 19 μs
Erasing
Approximately 5 ms
Approximately 19 μs
However, when operation is done with CPU clock of 80 MHz, maximum and minimum values of the time until initial user
branch processing are as shown in table 25.12.
Table 25.12 Intervals Until Start of User Branch Processing
Processing Name
Programming
Erasing
Max.
Approximately 500 μs
Approximately 2300 μs
Min.
Approximately 500 μs
Approximately 1000 μs
3. Write to flash-memory related registers by AUD or DMAC
While an instruction in on-chip RAM is being executed, the AUD or DMAC can write to the SCO bit in FCCS that is
used for a download request or FMATS that is used for MAT switching. Make sure that these registers are not
accidentally written to, otherwise an on-chip program may be downloaded and damage RAM or a MAT switchover
may occur and the CPU get out of control.
4. State in which AUD operation is disabled and interrupts are ignored
In the following modes or period, the AUD is in module standby mode and cannot operate. The NMI or maskable
interrupt requests are ignored; they are not executed and the interrupt sources are not retained.
⎯ Boot mode
⎯ Programmer mode
⎯ Checking the flash-memory related registers immediately after user boot mode is initiated (Approximately 100 μs
if operation is done at an internal frequency of 80 MHz after the reset signal is released)
5. Compatibility with programming/erasing program of conventional F-ZTAT SH microcomputer
A programming/erasing program for flash memory used in the conventional F-ZTAT SH microcomputer which does
not support download of the on-chip program by a SCO transfer request cannot run in this LSI.
Be sure to download the on-chip program to execute programming/erasing of flash memory in this LSI.
6. Monitoring runaway by WDT
Unlike the conventional F-ZTAT SH microcomputer, no countermeasures are available for a runaway by WDT during
programming/erasing by the downloaded on-chip program.
Prepare countermeasures (e.g. use of the user branch routine and periodic timer interrupts) for WDT while taking the
programming/erasing time into consideration as required.
7. FWE pin state
Make sure not to change the state of the FWE pin during the flash memory reprogramming. Make sure not to drive the
FWE pin low instantaneously even if the noise occurs. Programming/erasing results are not guaranteed if the FWE
state is changed during the flash memory reprogramming.
Rev.3.00 Mar. 12, 2008 Page 773 of 948
REJ09B0177-0300