SH7059 Datasheet, PDF (501/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

16. Synchronous Serial Communication Unit (SSU)
16.4.4 Data Input/Output Pins and Port IO Register Setting
When the SSU is used, for each data input/output pin during the initialization, the SSU function must be selected by the
port control register and the input/output direction must be set by the port IO register depending on the mode.
Table 16.5 shows port IO register settings in each mode.
Table 16.5 Port IO Register Setting in SSU
Register
TE
RE
SSCK0
PB13IOR
0
0
1
1
1
0
1
Legend: *: Don't care
Channel 0
SSI0
PA15IOR
*
0
I/O port
SSO0
PA14IOR
*
0
1
SSCK1
PB15IOR or
PL7IOR
1
Channel 1
SSI1
PC3IOR
*
0
SSO1
PC2IOR
*
0
1
16.4.5 Data Transmission and Data Reception
The SSU performs data communications using the bus: the clock line (SSCK), data input (SSI), data output (SSO), and
chip select (SCS).
• SSU Initialization
Figure 16.4 shows an example of the SSU initialization. Before transmitting and receiving data, first clear the TE and RE
bits in SSER to 0, then initialize the SSU.
Note: When the operating mode or transfer format is changed for example, the TE and RE bits must be cleared to 0.
When the TE bit is cleared to 0, the TDRE bit is set to 1. Note that clearing the RE bit to 0 does not initialize the
values of the RDRF and ORER bits or the contents of SSRDR.
Rev.3.00 Mar. 12, 2008 Page 411 of 948
REJ09B0177-0300