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SH7059 Datasheet, PDF (466/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
15. Serial Communication Interface (SCI)
Initialization
1
Start of transmission
Read TDRE bit in SSR
2
No
TDRE = 1?
Yes
Write transmit data to TDR
and clear TDRE bit in SSR to 0
All data transmitted?
3
No
Yes
Read TEND bit in SSR
No
TEND = 1?
Yes
Output break signal?
Yes
Clear port DR to 0
No
4
Clear TE bit in SCR to 0;
select theTxD pin as an
5
output port with the PFC
1. SCI initialization: Set the TxD pin using the
PFC. After the TE bit is set to 1, a frame of
1s is output, and transmission is enabled.
2. SCI status check and transmit data write:
Read the serial status register (SSR), check
that the TDRE bit is 1, then write transmit
data in the transmit data register (TDR) and
clear TDRE to 0.
3. Continue transmitting serial data: Read the
TDRE bit to check whether it is safe to write
(if it reads 1); if so, write data in TDR, then
clear TDRE to 0. When the DMAC is started
by a transmit-data-empty interrupt request
(TXI) in order to write data in TDR, the
TDRE bit is checked and cleared
automatically.
4. To output a break at the end of serial
transmission, first clear the port data
register (DR) to 0, then clear the TE bit to 0
in SCR and use the PFC to establish the
TxD pin as an output port.
Note: Do not write to SMR, SCR, BRR, or
SDCR between the start and the end of
a transmit operation. However, this does
not apply to operation 5.
End of transmission
Figure 15.5 Sample Flowchart for Transmitting Serial Data
In transmitting serial data, the SCI operates as follows:
1. The SCI monitors the TDRE bit in SSR. When TDRE is cleared to 0, the SCI recognizes that the transmit data register
(TDR) contains new data, and loads this data from TDR into the transmit shift register (TSR).
2. After loading the data from TDR into TSR, the SCI sets the TDRE bit to 1 and starts transmitting. If the transmit-data-
empty interrupt enable bit (TIE) is set to 1 in SCR, the SCI requests a transmit-data-empty interrupt (TXI) at this time.
Serial transmit data is transmitted in the following order from the TxD pin:
a. Start bit: one 0-bit is output.
b. Transmit data: seven or eight bits of data are output, LSB first.
c. Parity bit or multiprocessor bit: one parity bit (even or odd parity) or one multiprocessor bit is output. Formats in
which neither a parity bit nor a multiprocessor bit is output can also be selected.
d. Stop bit: one or two 1-bits (stop bits) are output.
Rev.3.00 Mar. 12, 2008 Page 376 of 948
REJ09B0177-0300