SH7059 Datasheet, PDF (560/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Controller Area Network-II (HCAN-II)
17.6.9 Cycle Maximum Register n (CMAXn) (n = 0, 1)
The cycle maximum register (CMAX) is a 4-bit readable/writable register that stores the maximum value for the cycle
counter (CCR) for timer triggered transmission to set the number of basic cycles in the matrix system. When the cycle
counter reaches the maximum value (CCR = CMAX), the cycle counter is cleared to 0 and an interrupt is generated on
IRR10.
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CMAX[3:0]
Initial Value: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R R R R R R R R R R R R/W R/W R/W R/W
Bit
15 to 4
3 to 0
Bit Name Initial Value R/W
—
0
R
CMAX[3:0] 0
R/W
Description
Reserved
Cycle Maximum Value
Store the maximum value of CCR. The initial value of CMAX is 0 making the
cycle counter be disabled. During the time trigger setting, the requested
value must be programmed.
17.6.10 Input Capture Registers n (ICR0_cc n, ICR0_buf, ICR0_tm n, ICR1 n) (n = 0, 1)
The input capture registers are composed of one 4-bit readable/writable register (ICR0_cc) and two 16-bit
readable/writable registers (ICR0_tm and ICR1).
• ICR0_cc n (n = 0, 1)
ICR0_cc can be used for global synchronization, when used with ICR0_tm. The current basic cycle value (Cycle_Counter)
is captured at the SOF if ICR0_cc is enabled by bit 14 in TCR, regardless whether the receive message matches the ID set
in the receive mailboxes or not. If ICR0_cc is disabled by bit 14 in TCR, it retains the current value.
• ICR0_buf n (n = 0, 1): Input Capture Double-Buffer Register
A temporary retain buffer that accesses ICR0_cc and ICR0_tm simultaneously. The ICR0_buf value is same as the
ICR0_cc value.
• ICR0_tm n (n = 0, 1)
ICR0_tm can be used for global synchronization, when used with ICR0_cc. The timer value is captured at the SOF if
ICR0_tm is enabled by bit 14 in TCR, regardless whether the receive message matches the ID set in the receive mailboxes
or not. If ICR0_tm is disabled by bit 14 in TCR, it retains the current value.
• Read operation for ICR0_cc, ICR0_buf, and ICR0_tm
Read the input capture register (ICR0_tm). (The value of ICR0_cc is written to the input capture double-buffer register
(ICR0_buf) simultaneously.)
Then read the input capture double-buffer (ICR0_buf).
Rev.3.00 Mar. 12, 2008 Page 470 of 948
REJ09B0177-0300