SH7059 Datasheet, PDF (720/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

23. I/O Ports (I/O)
23.6.2 Port E Data Register (PEDR)
Bit: 15
14
13
12
11
10
9
8
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8
DR
DR
DR
DR
DR
DR
DR
DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
DR
DR
DR
DR
DR
DR
DR
DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port E data register (PEDR) is a 16-bit readable/writable register that stores port E data. Bits PE15DR to PE0DR
correspond to pins PE15/A15 to PE0/A0.
When a pin functions as a general output, if a value is written to PEDR, that value is output directly from the pin, and if
PEDR is read, the register value is returned directly regardless of the pin state. When the POD pin is driven low, general
outputs go to the high-impedance state regardless of the PEDR value. When the POD pin is driven high, the written value
is output from the pin.
When a pin functions as a general input, if PEDR is read, the pin state, not the register value, is returned directly. If a value
is written to PEDR, although that value is written into PEDR, it does not affect the pin state. Table 23.10 summarizes port
E data register read/write operations.
PEDR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), in hardware standby mode, and in
software standby mode. It is not initialized in sleep mode.
Table 23.10 Port E Data Register (PEDR) Read/Write Operations
Bits 15 to 0:
PEIOR
0
1
Pin Function
Read
General input
Pin state
Other than general input Pin state
General output
PEDR value
Other than general
output
PEDR value
Write
Value is written to PEDR, but does not affect pin state
Value is written to PEDR, but does not affect pin state
Write value is output from pin (POD pin = high)
High impedance regardless of PEDR value (POD pin =
low)
Value is written to PEDR, but does not affect pin state
Rev.3.00 Mar. 12, 2008 Page 630 of 948
REJ09B0177-0300