SH7059 Datasheet, PDF (597/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

ADIE
Set*
A/D conver- Set*
sion starts
ADST
ADF
Set*
Clear*
18. A/D Converter
Clear*
State of channel 0
Idle
(AN0)
State of channel 1
Idle
(AN1)
A/D con-
Idle
version (1)
State of channel 2
Idle
(AN2)
State of channel 3
(AN3)
Idle
A/D con-
Idle
version (2)
ADDR0
ADDR1
Read conversion
result
A/D conversion result (1)
Read conversion
result
A/D conversion result (2)
ADDR2
ADDR3
Note: * Vertical arrows ( ) indicate instructions executed by software.
Figure 18.3 Example of A/D Converter Operation (Single Mode, Channel 1 Selected)
18.4.2 Scan Mode
Scan mode is useful for monitoring analog inputs in a group of one or more channels. Scan mode is selected for A/D0 or
A/D1 by setting the ADM1 and ADM0 bits in A/D control/status register 0 or 1 (ADSCR0 or ADSCR1) to 01 (4-channel
scan mode), 10 (8-channel scan mode), or 11 (12-channel scan mode).
For A/D2, scan mode is selected by setting the ADM1 and ADM0 bits in A/D control/status register 2 (ADCSR2) to 01
(4-channel scan mode) or 10 (8-channel scan mode). When the ADCS bit is cleared to 0 and the ADST bit is set to 1 in the
A/D control register (ADCR), single-cycle scanning is performed. When the ADCS bit is set to 1 and the ADST bit is set
to 1, continuous scanning is performed.
In scan mode, A/D conversion is performed in low-to-high analog input channel number order (AN0, AN1 ... AN11,
AN12, AN13 ... AN23, AN24, AN25 ... AN31).
In single-cycle scanning, the ADF bit in ADCSR is set to 1 when conversion has been performed once on all the set
channels, and the ADST bit is automatically cleared to 0.
Rev.3.00 Mar. 12, 2008 Page 507 of 948
REJ09B0177-0300