SH7059 Datasheet, PDF (587/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Name
Abbreviation
R/W
A/D control register 1
ADCR1
R/W
A/D trigger register 1
A/D control/status register 2
ADTRGR1
ADCSR2
R/W
R/(W)*²
A/D control register 2
ADCR2
R/W
A/D trigger register 2
ADTRGR2
R/W
Notes: 1. A 16-bit access must be made on a word boundary.
2. Only 0 can be written to bit 7 to clear the flag.
Initial Value
H'0F
H'FF
H'08
H'0F
H'FF
18. A/D Converter
Address
H'FFFFF839
H'FFFFF72E
H'FFFFF858
H'FFFFF859
H'FFFFF72F
Access Size*¹
8, 16
8
8, 16
8, 16
8
18.2 Register Descriptions
18.2.1 A/D Data Registers 0 to 31 (ADDR0 to ADDR31)
A/D data registers 0 to 31 (ADDR0 to ADDR31) are 16-bit read-only registers that store the results of A/D conversion.
There are 32 registers, corresponding to analog inputs 0 to 31 (AN0 to AN31).
The ADDR registers are initialized to H'0000 by a power-on reset, and in hardware standby mode and software standby
mode.
Bit:
7
6
5
4
3
2
1
0
ADDRnH
AD9
AD8
AD7
AD6
AD5
ADR
AD3
AD2
(upper byte)
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
ADDRnL
(lower byte)
AD1
AD0
—
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R
Note: n = 0 to 31
The A/D converter converts analog input to a 10-bit digital value. The upper 8 bits of this data are stored in the upper byte
of the ADDR corresponding to the selected channel, and the lower 2 bits in the lower byte of that ADDR. Only the most
significant 2 bits of the ADDR lower byte data are valid.
Table 18.3 shows correspondence between the analog input channels and A/D data registers.
Rev.3.00 Mar. 12, 2008 Page 497 of 948
REJ09B0177-0300