SH7059 Datasheet, PDF (760/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. ROM (SH7058S)
Area to be
downloaded
(Size: 3 Kbytes)
Unusable area in
programming/erasing
processing period
<On-chip RAM> Address
RAM emulation area RAMTOP (H'FFFF0000)
or area that can be
used by user
DPFR
FTDAR setting
(Return value: 1 byte)
System use area
(15 bytes)
Programming/
erasing entry
FTDAR setting+16
Initialization
process entry
FTDAR setting+32
Initialization +
programming program
or Initialization +
erasing program
Area that can be
used by user
FTDAR setting+3072
RAMEND (H'FFFFBFFF)
Figure 24.10 RAM Map after Download
(2) Programming Procedure in User Program Mode
The procedures for download, initialization, and programming are shown in figure 24.11.
Start programming
procedure program
Select on-chip program
to be downloaded and
set download destination
by FTDAR
(2.1)
1
Set FKEY to H'5A
(2.9)
Set FKEY to H'A5
After clearing VBR,
set SCO to 1 and
execute download
(2.2)
(2.3)
Clear FKEY to 0
(2.4)
DPFR=0?
Yes
(2.5)
No
Download error processing
Set the FPEFEQ and
FUBRA parameters
(2.6)
Initialization
JSR FTDAR setting+32 (2.7)
FPFR=0?
Yes
1
(2.8)
No
Initialization error processing
Set parameter to R4 and
R5 (FMPAR and FMPDR)
(2.10)
Programming
JSR FTDAR setting+16
(2.11)
FPFR=0?
(2.12)
No
Yes
Clear FKEY and
programming
error processing
No
Required data
programming is
(2.13)
completed?
Yes
Clear FKEY to 0
(2.14)
End programming
procedure program
Figure 24.11 Programming Procedure
Rev.3.00 Mar. 12, 2008 Page 670 of 948
REJ09B0177-0300