SH7059 Datasheet, PDF (768/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. ROM (SH7058S)
Start erasing
procedure program
Select on-chip program
to be downloaded and
set download destination
by FTDAR
Set FKEY to H'A5
After clearing VBR,
set SCO to 1 and
execute download
Clear FKEY to 0
DPFR=0 ?
No
Yes _{Download error processing}
Set the FPEFEQ and
FUBRA parameters
Initialization
JSR FTDAR setting+32
FPFR=0 ?
No
Yes _{Initialization error processing}
1
User-boot-MAT
selection state
1
Set FMATS to value other
MAT
than H'AA to select user MAT _switchover
Set FKEY to H'5A
Set FEBS parameter
Programming
JSR FTDAR setting+16
FPFR=0 ?
No
Yes Clear FKEY and erasing
error processing*
Required
No _{block erasing is}
completed?
Yes
Clear FKEY to 0
Set FMATS to H'AA to
MAT
select user boot MAT switchover
End erasing
procedure program
Note: * The MAT must be switched by FMATS to perform the
erasing error processing in the user boot MAT.
Figure 24.15 Procedure for Erasing User MAT in User Boot Mode
The difference between the erasing procedures in user program mode and user boot mode depends on whether the MAT is
switched or not as shown in figure 24.15.
MAT switching is enabled by writing a specific value to FMATS. However note that while the MATs are being switched,
the LSI is in an unstable state, e.g. access to a MAT is not allowed until MAT switching is completed finished, and if an
interrupt occurs, from which MAT the interrupt vector is read from is undetermined. Perform MAT switching in
accordance with the description in section 24.8.1, Switching between User MAT and User Boot MAT.
Except for MAT switching, the erasing procedure is the same as that in user program mode.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user MAT, and external space) is
shown in section 24.10.3, Storable Area for Procedure Program and Programming Data.
Rev.3.00 Mar. 12, 2008 Page 678 of 948
REJ09B0177-0300