SH7059 Datasheet, PDF (579/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17. Controller Area Network-II (HCAN-II)
17.8.6 Mailbox Access during HCAN Sleep Mode
Do not access to Mailbox during the HCAN sleep mode. If Mailbox is accessed during HCAN sleep mode, the CPU may
stop. The CPU does not stop when the register is accessed during the sleep mode or when Mailbox is accessed except
during the HCAN sleep mode.
MCR1 = 1
GSR4 = 1 ?
Yes
MCR1 = 0 & MCR5 = 0
CLK stop
No User monitor
Accesses to mailbox are prohibited
during this period.
Bus operation?
No
Yes
IRRl2 = 1
IMRl2 = 1 ?
No
Yes
No
MCR7 = 0 ?
Yes
Manual
cancellation
Sleep mode
No
cancellation
Automatic
cancellation
Yes
MCR5 = 0
MCR5 = 0
Figure 17.17 HCAN Sleep Mode Flowchart
Rev.3.00 Mar. 12, 2008 Page 489 of 948
REJ09B0177-0300