SH7059 Datasheet, PDF (783/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

24. ROM (SH7058S)
Table 24.15 Commands in Programmer Mode
1st Cycle
2nd Cycle
Command
Numberof
Cycles
Memory
MAT to be
Accessed
Mode
Address Data
Mode Address Data
Memory-read
1+n
mode
User MAT
User boot
MAT
Write
Write
X
H'00
Read
RA
X
H'05
Dout
Auto-program
129
mode
User MAT
User boot
MAT
Write
Write
X
H'40
Write
WA
Din
X
H'45
Auto-erase mode 2
User MAT
Write
X
H'20
Write
X
H'20
User boot
MAT
Write
X
H'25
H'25
Status-read
2
mode
Common to
both MATs
Write
X
H'71
Write
X
H'71
Notes
1. In auto-program mode, 129 cycles are required in command writing because of the simultaneous 128-byte write.
2. In memory read mode, the number of cycles varies with the number of address writing cycles (n).
3. In an automatic erasure command, input the same command code for the 1st and 2nd cycles (for erasing of the
user boot MAT, input H'25 for the 1st and 2nd cycles).
24.9.3 Memory-Read Mode
(1) On completion of automatic programming, automatic erasure, or status read, the LSI enters a command input wait
state. So, to read the contents of memory after these operations, issue the command to transit to memory-read mode
before reading from the memory.
(2) In memory-read mode, the writing of commands is possible in the same way as in command input wait state.
(3) After entering memory-read mode, continuous reading is possible.
(4) After power has first been supplied, the LSI enters memory-read mode.
For the AC characteristics in memory read mode, see section 24.10.2, AC Characteristics and Timing in Programmer
Mode.
Rev.3.00 Mar. 12, 2008 Page 693 of 948
REJ09B0177-0300