SH7059 Datasheet, PDF (270/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
11.1.5 Inter-Channel and Inter-Module Signal Communication Diagram
Figure 11.11 shows the connections between channels and between modules in the ATU-II.
TI0A
Channel 0
ICR0A
ICR0B
ICR0C
ICR0D
Capture trigger
Channel 1
OSBR1
OCR1
Channel 2
OSBR2
OCR2A
OCR2B
•••
OCR2H
One-shot start
One-shot terminate
Channel 8
DCNT8A
DCNT8B
DCNT8C
DCNT8D
DCNT8E
DCNT8F
DCNT8G
DCNT8H
ITVRR1
ITVRR2A
ITVRR2B
TCNT1A
TCNT1B
GR1A
GR1B
•••
GR1H
TCNT2A
TCNT2B
GR2A
GR2B
•••
GR2H
DCNT8I
DCNT8J
DCNT8K
DCNT8L
DCNT8M
DCNT8N
DCNT8O
DCNT8P
DMAC activation
Capture trigger
TI10(AGCK)
TI10 multiplication
(AGCKM)
TI10(AGCK)
TI10 multiplication
(AGCKM)
A/D converter activation
Channel 10
OCR10B
TCNT10F
Counter clear trigger
Capture trigger
Channel 3
GR3A
GR3B
GR3C
GR3D
Channel 4
Channel 5
Channel 9
GR9A
GR9B
GR9C
GR9D
GR9E
GR9F
TI10(AGCK)
TI10 multiplication
(AGCKM)
TI10(AGCK)
TI10 multiplication
(AGCKM)
Channel 6, 7
TI10(AKCK)
TI10 multiplication
(AGCKM)
TCNT6, 7x
X: A, B, C, D
CYLR6, 7x
DTR6, 7x
BFR6, 7x
Channel 11
TCNT11
GR11A
GR11B
Compare-match signal transmission
to advanced pulse controller (APC)
Figure 11.11 Inter-Module Communication Signals
DMAC activation
(compare-match)
Rev.3.00 Mar. 12, 2008 Page 180 of 948
REJ09B0177-0300