SH7059 Datasheet, PDF (54/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Differences between SH7058 and SH7058S/SH7059
SH7058 (Rev.3, REJ09B0046-0300H)
23.5.2 User Program Mode
(4) Erasing and Programming Procedure in User Program
Mode
Figure 23.13 Sample Procedure of Repeating RAM
Emulation, Erasing, and Programming (Overview)
877
Set FTDAR to H'02
(Specify H'FFFF1000 as download destination)
SH7058S/SH7059
25.5.2 User Program Mode
(4) Erasing and Programming Procedure in User Program
Mode
Figure 25.13 Sample Procedure of Repeating RAM
Emulation, Erasing, and Programming (Overview)
Figure amended
Set FTDAR to H'02
(Specify H'FFFE9000 as download destination)
Set FTDAR to H'03
(Specify H'FFFF1800 as download destination)
Set FTDAR to H'04
(Specify H'FFFEA000 as download destination)
Set FMPDR to H'FFFF0000 to program relevant block
(execute programming program)
Set FMPDR to H'FFFE8000 to program relevant block
(execute programming program)
In the above example, the erasing program and
programming program are downloaded to areas excluding
the 4 kbytes (H'FFFF0000 to H'FFFF0FFF) from the start
of on-chip ROM.
In the above example, the erasing program and
programming program are downloaded to areas excluding
the 4 Kbytes (H'FFFE8000 to H'FFFE8FFF) from the start
of on-chip ROM.
Description amended
• Be sure to initialize both the erasing program and
programming program.
Initialization by setting the FPEFEQ and FUBRA
parameters must be performed for both the erasing
program and the programming program. Initialization must
be executed for both entry addresses: (download start
address for erasing program) + 32 bytes (H'FFFF1020 in
this example) and (download start address for
programming program) + 32 bytes (H'FFFF1820 in this
example).
• Be sure to initialize both the erasing program and
programming program.
Initialization by setting the FPEFEQ and FUBRA
parameters must be performed for both the erasing
program and the programming program. Initialization must
be executed for both entry addresses: (download start
address for erasing program) + 32 bytes (H'FFFE9020 in
this example) and (download start address for
programming program) + 32 bytes (H'FFFEA020 in this
example).
23.5.3 User Boot Mode
(1) User Boot Mode Initiation
878
The RAM area about 1.2 kbytes from H'FFFF0800 and 4
bytes from H'FFFFBFFC (a stack area) is used by the
routine. … Neither can the AUD be used in this period. This
period is 100 μs while operating at an internal frequency of
40 MHz.
25.5.3 User Boot Mode
(1) User Boot Mode Initiation
Description amended
The RAM area about 3 Kbytes from H'FFFFB000 and 128
bytes from H'FFFFBF80 to H'FFFFBFFF (a stack area) is
used by the routine. … Neither can the AUD be used in this
period. This period is approximately 100 μs while operating
at an internal frequency of 80 MHz.
23.6.1 Hardware Protection
881
Programming and erasing of flash memory is forcibly
disabled or suspended by hardware protection. In this
state, the downloading of an on-chip program and
initialization of the flash memory are possible.
25.6.1 Hardware Protection
Description amended
Programming and erasing of flash memory is forcibly
disabled or suspended by hardware protection. In this state
by the FWE pin, the downloading of an on-chip program
and initialization of the flash memory are possible.
Rev.3.00 Mar. 12, 2008 Page liv of xc
REJ09B0177-0300