SH7059 Datasheet, PDF (398/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
Start
Select counter clock 1
Set port-ATU-II connection 2
Set input waveform edge
detection
3
Start counter
4
1. Select the first-stage counter clock ' in prescaler register
(PSCR) and the second-stage counter clock " with the
CKSEL bit in the timer control register (TCR). When
selecting an external clock, also select the external clock
edge type with the CKEG bit in TCR.
2. Set the port control register, corresponding to the port for
signal input as the input capture trigger, to ATU input
capture input.
3. Select rising edge, falling edge, or both edges as the input
capture signal input edge(s) with the timer I/O control
register (TIOR).
If necessary, a timer interrupt request can be sent to the
CPU on input capture by making the appropriate setting in
the interrupt enable register (TIER). In channel 0, setting the
DMAC allows DMAC activation to be performed.
4. Set the corresponding bit to 1 in the timer start register
(TSTR) to start the free-running counter (TCNT) for the
relevant channel.
Note: When input capture occurs, the counter value is always
captured, irrespective of free-running counter (TCNT)
activation.
Input capture operation
Figure 11.53 Sample Setup Procedure for Input Capture
Sample Setup Procedure for Waveform Output by Output Compare-Match: An example of the setup procedure for
waveform output by output compare-match is shown in figure 11.54.
Start
Select counter clock 1
Set port-ATU-II connection 2
Select waveform output
mode
3
Set output timing
4
Start counter
5
1. Select the first-stage counter clock ' in prescaler register
(PSCR), and the second-stage counter clock " with the
CKSEL bit in the timer control register (TCR). When
selecting an external clock, also select the external clock
edge type with the CKEG bit in TCR.
2. Set the port control register corresponding to the waveform
output port to ATU output compare-match output. Also set
the corresponding bit to 1 in the port IO register to specify
the output attribute for the port.
3. Select 0, 1, or toggle output for output compare-match
output with the timer I/O control register (TIOR). If
necessary, a timer interrupt request can be sent to the CPU
on output compare-match by making the appropriate setting
in the interrupt enable register (TIER).
4. Set the timing for compare-match generation in the ATU
general register (GR) corresponding to the port set in (2).
5. Set the corresponding bit to 1 in the timer start register
(TSTR) to start the free-running counter (TCNT). Waveform
output is performed from the relevant port when the TCNT
value and GR value match.
Waveform output
Figure 11.54 Sample Setup Procedure for Waveform Output by Output Compare-Match
Rev.3.00 Mar. 12, 2008 Page 308 of 948
REJ09B0177-0300