SH7059 Datasheet, PDF (1029/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix B Pin States
Appendix B Pin States
Tables B.1, B.2, and B.3 show this LSI pin states.
Table B.1 Pin States
Type
Pin Name
Clock
CK*¹
XTAL
EXTAL
System
control
PLLCAP
RES
FWE
HSTBY
MD0
MD1
MD2
WDTOVF
BREQ
BACK
Interrupt
NMI
IRQ0 to IRQ7
IRQOUT
Address bus A0 to A21
Data bus D0 to D7
Bus
control
Port
D8 to D15
WAIT
WRH, WRL
RD
CS0
CS1 to CS3
POD
ATU-II
TI0A to TI0D
TIO1A to TIO1H
TIO2A to TIO2H
TIO3A to TIO3D
Reset State
Power-On
ROMless
Expanded Mode
8 Bits 16 Bits
Expanded
Mode with
ROM
O
I/O
I
I
I
I
I
I
I
I
O
—
—
I
—
—
O
—
Z
—
—
Z
—
I
—
H
—
H
—
H
—
—
—
—
—
—
—
Pin State
Power-Down State
Single-
Chip
Mode
Hardware
Standby
Z
L
Z
I
Z
I
I
I
I
I
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Software
Standby
Z
L
Z
I
I
I
I
I
I
I
Z
Z
Z
I
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
H-UDI
Module
Standby
O
I/O
I
I
I
I
I
I
I
I
O
I
O
I
I
O
O
I/O
I/O
I
O
O
O
O
I
I
I/O
I/O
I/O
AUD Module Bus-
Standby Released
State
O
O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
O
I
I
O
L
I
I
I
I
O
O
O
Z
I/O
Z
I/O
Z
I
I
O
Z
O
Z
O
Z
O
Z
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
Rev.3.00 Mar. 12, 2008 Page 939 of 948
REJ09B0177-0300