SH7059 Datasheet, PDF (131/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Table 2.12 Data Transfer Instructions
Instruction
MOV #imm,Rn
MOV.W @(disp,PC),Rn
MOV.L @(disp,PC),Rn
MOV Rm,Rn
MOV.B Rm,@Rn
MOV.W Rm,@Rn
MOV.L Rm,@Rn
MOV.B @Rm,Rn
MOV.W @Rm,Rn
MOV.L @Rm,Rn
MOV.B Rm,@–Rn
MOV.W Rm,@–Rn
MOV.L Rm,@–Rn
MOV.B @Rm+,Rn
MOV.W @Rm+,Rn
MOV.L @Rm+,Rn
MOV.B R0,@(disp,Rn)
MOV.W R0,@(disp,Rn)
MOV.L Rm,@(disp,Rn)
MOV.B @(disp,Rm),R0
MOV.W @(disp,Rm),R0
MOV.L @(disp,Rm),Rn
MOV.B Rm,@(R0,Rn)
MOV.W Rm,@(R0,Rn)
MOV.L Rm,@(R0,Rn)
MOV.B @(R0,Rm),Rn
MOV.W @(R0,Rm),Rn
MOV.L @(R0,Rm),Rn
MOV.B R0,@(disp,GBR)
MOV.W R0,@(disp,GBR)
MOV.L R0,@(disp,GBR)
MOV.B @(disp,GBR),R0
Instruction Code
1110nnnniiiiiiii
1001nnnndddddddd
1101nnnndddddddd
0110nnnnmmmm0011
0010nnnnmmmm0000
0010nnnnmmmm0001
0010nnnnmmmm0010
0110nnnnmmmm0000
0110nnnnmmmm0001
0110nnnnmmmm0010
0010nnnnmmmm0100
0010nnnnmmmm0101
0010nnnnmmmm0110
0110nnnnmmmm0100
0110nnnnmmmm0101
0110nnnnmmmm0110
10000000nnnndddd
10000001nnnndddd
0001nnnnmmmmdddd
10000100mmmmdddd
10000101mmmmdddd
0101nnnnmmmmdddd
0000nnnnmmmm0100
0000nnnnmmmm0101
0000nnnnmmmm0110
0000nnnnmmmm1100
0000nnnnmmmm1101
0000nnnnmmmm1110
11000000dddddddd
11000001dddddddd
11000010dddddddd
11000100dddddddd
2. CPU
Operation
Execution
Cycles
#imm → Sign extension → Rn 1
(disp × 2 + PC) → Sign
1
extension → Rn
(disp × 4 + PC) → Rn
1
Rm → Rn
1
Rm → (Rn)
1
Rm → (Rn)
1
Rm → (Rn)
1
(Rm) → Sign extension → Rn 1
(Rm) → Sign extension → Rn 1
(Rm) → Rn
1
Rn–1 → Rn, Rm → (Rn)
1
Rn–2 → Rn, Rm → (Rn)
1
Rn–4 → Rn, Rm → (Rn)
1
(Rm) → Sign extension →
1
Rn,Rm + 1 → Rm
(Rm) → Sign extension →
1
Rn,Rm + 2 → Rm
(Rm) → Rn,Rm + 4 → Rm
1
R0 → (disp + Rn)
1
R0 → (disp × 2 + Rn)
1
Rm → (disp × 4 + Rn)
1
(disp + Rm) → Sign extension → 1
R0
(disp × 2 + Rm) → Sign
1
extension → R0
(disp × 4 + Rm) → Rn
1
Rm → (R0 + Rn)
1
Rm → (R0 + Rn)
1
Rm → (R0 + Rn)
1
(R0 + Rm) → Sign extension → 1
Rn
(R0 + Rm) → Sign extension → 1
Rn
(R0 + Rm) → Rn
1
R0 → (disp + GBR)
1
R0 → (disp × 2 + GBR)
1
R0 → (disp × 4 + GBR)
1
(disp + GBR) → Sign extension 1
→ R0
T Bit
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Rev.3.00 Mar. 12, 2008 Page 41 of 948
REJ09B0177-0300