SH7059 Datasheet, PDF (278/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
• Bits 5 and 4—Clock Edge 1 and 0 (CKEG1, CKEG0): These bits select the count edge(s) for external clock TCLKA
and TCLKB input.
Bit 5: CKEG1
0
1
Bit 4: CKEG0
0
1
0
1
Description
Rising edges counted
Falling edges counted
Both rising and falling edges counted
Count disabled
(Initial value)
• Bits 3 to 0—Clock Select 3 to 0 (CKSEL3 to CKSEL0): These bits select whether an internal clock or external clock is
used.
When an internal clock is selected, scaled clock φ" is selected from φ', φ'/2, φ'/4, φ'/8, φ'/16, and φ'/32.
When an external clock is selected, TCLKA, TCLKB, TI10 pin input, or a TI10 pin input multiplied clock is selected.
When TI10 pin input and TI10 pin input clock multiplication are selected, set CKEG1 and CKEG0 in TCR10 so that
TI10 input is possible.
Bit 3:
CKSEL3
0
Bit 2:
CKSEL2
0
1
1
0
1
Legend: *: Don't care
Bit 1:
CKSEL1
0
1
0
1
0
1
*
Bit 0:
CKSEL0
0
1
0
1
0
1
0
1
0
1
*
*
Description
Internal clock φ": counting on φ'
(Initial value)
Internal clock φ": counting on φ'/2
Internal clock φ": counting on φ'/4
Internal clock φ": counting on φ'/8
Internal clock φ": counting on φ'/16
Internal clock φ": counting on φ'/32
External clock: counting on TCLKA pin input
External clock: counting on TCLKB pin input
Counting on TI10 pin input (AGCK)
Counting on multiplied (corrected)(AGCKM) TI10 pin input clock
Setting prohibited
Setting prohibited
Rev.3.00 Mar. 12, 2008 Page 188 of 948
REJ09B0177-0300