SH7059 Datasheet, PDF (857/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
H'000000
H'001000
H'002000
H'003000
H'004000
H'005000
H'006000
H'007000
H'008000
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area is accessible as both a RAM
area and as a flash memory area.
H'FFFE8000
H'FFFEBFFF
Flash memory
(user MAT)
EB8 to EB15
On-chip RAM
H'17FFFF
H'FFFFBFFF
Figure 25.18 Example of Overlapped RAM Operation
Figure 25.18 shows an example of an overlap on block areas EB0 to EB3 of the flash memory.
Emulation is possible for four areas selected from among the eight areas, from EB0 to EB7, of the user MAT. The area is
selected by the setting of the RAM0 bit in RAMER.
(1) To overlap a part of the RAM on areas EB0 to EB3, to allow realtime programming of the data for this area, set the
RAMS bit in RAMER to 1, and each of the RAM0 bit to 0.
(2) Realtime programming is carried out using the overlaid area of RAM.
In programming or erasing the user MAT, it is necessary to run a program that implements a series of procedural steps,
including the downloading of an on-chip program. In this state, note that the RAM area overlaps with the area where the
on-chip program is downloaded. Prevent destruction of the data once it has been safely written to RAM by following
either of the procedures below.
(1) Once the tuning data has been safely written to the four areas used to emulate flash memory, secure the data in an
unused area.
(2) Write the tuning data to one of the four areas used to emulate flash memory. In this case, use the FTDAR register to
select an area for downloading that does not overlap with the area to be tuned.
Figure 25.19 shows an example in which the EB0 area is selected for tuning from among the four areas used for
emulation, and the data, once safely written to RAM, is then written to the EB0 area in the user MAT.
Rev.3.00 Mar. 12, 2008 Page 767 of 948
REJ09B0177-0300