SH7059 Datasheet, PDF (369/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
• Bit 3—Compare-Match Interrupt Enable 10G (CME10G): Enables or disables interrupt requests by CMF10G in
TSR10 when CMF10G is set to 1.
Bit 3: CME10G
0
1
Description
CMI10G interrupt requested by CMF10G is disabled
CMI10G interrupt requested by CMF10G is enabled
(Initial value)
• Bit 2—Compare-Match Interrupt Enable 10B (CME10B): Enables or disables interrupt requests by CMF10B in
TSR10 when CMF10B is set to 1.
Bit 2: CME10B
0
1
Description
CMI10B interrupt requested by CMF10B is disabled
CMI10B interrupt requested by CMF10B is enabled
(Initial value)
• Bit 1—Input Capture Interrupt Enable 10A (ICE10A): Enables or disables interrupt requests by ICF10A in TSR10
when ICF10A is set to 1.
Bit 1: ICE10A
0
1
Description
ICI10A interrupt requested by ICF10A is disabled
ICI10A interrupt requested by ICF10A is enabled
(Initial value)
• Bit 0—Compare-Match Interrupt Enable 10A (CME10A): Enables or disables interrupt requests by CMF10A in
TSR10 when CMF10A is set to 1.
Bit 0: CME10A
0
1
Description
CMI10A interrupt requested by CMF10A is disabled
CMI10A interrupt requested by CMF10A is enabled
(Initial value)
Rev.3.00 Mar. 12, 2008 Page 279 of 948
REJ09B0177-0300