SH7059 Datasheet, PDF (682/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

22. Pin Function Controller (PFC)
• Bit 5—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 4—PD2 Mode Bit (PD2MD): Selects the function of pin PD2/TIO1C.
Bit 4: PD2MD
0
1
Description
General input/output (PD2)
ATU-II input capture input/output compare output (TIO1C)
• Bit 3—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 2—PD1 Mode Bit (PD1MD): Selects the function of pin PD1/TIO1B.
Bit 2: PD1MD
0
1
Description
General input/output (PD1)
ATU-II input capture input/output compare output (TIO1B)
• Bit 1—Reserved: This bit is always read as 0. The write value should always be 0.
• Bit 0—PD0 Mode Bit (PD0MD): Selects the function of pin PD0/TIO1A.
Bit 0: PD0MD
0
1
Description
General input/output (PD0)
ATU-II input capture input/output compare output (TIO1A)
(Initial value)
(Initial value)
(Initial value)
22.3.10 Port E IO Register (PEIOR)
Bit: 15
14
13
12
11
10
9
8
PE15 PE14 PE13 PE12 PE11 PE10 PE9 PE8
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
IOR
IOR
IOR
IOR
IOR
IOR
IOR
IOR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port E IO register (PEIOR) is a 16-bit readable/writable register that selects the input/output direction of the 16 pins in
port E. Bits PE15IOR to PE0IOR correspond to pins PE15/A15 to PE0/A0. PEIOR is enabled when port E pins function
as general input/output pins (PE15 to PE0), and disabled otherwise.
When port E pins function as PE15 to PE0, a pin becomes an output when the corresponding bit in PEIOR is set to 1, and
an input when the bit is cleared to 0.
PEIOR is initialized to H'0000 by a power-on reset (excluding a WDT power-on reset), in hardware standby mode, and in
software standby mode. It is not initialized in sleep mode.
Rev.3.00 Mar. 12, 2008 Page 592 of 948
REJ09B0177-0300