SH7059 Datasheet, PDF (850/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

25. ROM (SH7059)
In the above example, the erasing program and programming program are downloaded to areas excluding the 4 Kbytes
(H'FFFE8000 to H'FFFE8FFF) from the start of on-chip ROM.
Download and initialization are performed only once at the beginning.
In this kind of operation, note the following:
• Be careful not to damage on-chip RAM with overlapped settings.
In addition to the RAM emulation area, erasing program area, and programming program area, areas for the
user procedure programs, work area, and stack area are reserved in on-chip RAM. Do not make settings that
will overwrite data in these areas.
• Be sure to initialize both the erasing program and programming program.
Initialization by setting the FPEFEQ and FUBRA parameters must be performed for both the erasing program
and the programming program. Initialization must be executed for both entry addresses: (download start address
for erasing program) + 32 bytes (H'FFFE9020 in this example) and (download start address for programming
program) + 32 bytes (H'FFFEA020 in this example).
25.5.3 User Boot Mode
This LSI has user boot mode which is initiated with different mode pin settings than those in user program mode or boot
mode. User boot mode is a user-arbitrary boot mode, unlike boot mode that uses the on-chip SCI.
Only the user MAT can be programmed/erased in user boot mode. Programming/erasing of the user boot MAT is only
enabled in boot mode or programmer mode.
(1) User Boot Mode Initiation
For the mode pin settings to start up user boot mode, see table 25.1, Relationship between FWE and MD pins and
Operating Modes.
When the reset start is executed in user boot mode, the check routine for flash-memory related registers runs. The
RAM area about 3 Kbytes from H'FFFFB000 and 128 bytes from H'FFFFBF80 to H'FFFFBFFF (a stack area) is used
by the routine. While the check routine is running, NMI and all other interrupts cannot be accepted. Neither can the
AUD be used in this period. This period is approximately 100 μs while operating at an internal frequency of 80 MHz.
Next, processing starts from the execution start address of the reset vector in the user boot MAT. At this point, H'AA is
set to the flash MAT select register (FMATS) because the execution MAT is the user boot MAT.
(2) User MAT Programming in User Boot Mode
For programming the user MAT in user boot mode, additional processings made by setting FMATS are required:
switching from user-boot-MAT selection state to user-MAT selection state, and switching back to user-boot-MAT
selection state after programming completes.
Figure 25.14 shows the procedure for programming the user MAT in user boot mode.
Rev.3.00 Mar. 12, 2008 Page 760 of 948
REJ09B0177-0300