SH7059 Datasheet, PDF (47/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Differences between SH7058 and SH7058S/SH7059
SH7058 (Rev.3, REJ09B0046-0300H)
SH7058S/SH7059
23.8.2 Interrupts during Programming/Erasing
(2) Interrupts during programming/erasing
892, 893
1. When flash memory is being programmed or erased,
both the user MAT and user boot MAT cannot be
accessed. Prepare the interrupt vector table and interrupt
processing routine in on-chip RAM or external memory.
Make sure the flash memory being programmed or erased
is not accessed by the interrupt processing routine. If flash
memory is read, the read values are not guaranteed. If the
relevant bank in flash memory that is being programmed or
erased is accessed, the error protection state is entered,
and programming or erasing is aborted. If a bank other
than the relevant bank is accessed, the error protection
state is not entered but the read values are not guaranteed.
24.8.2 Interrupts during Programming/Erasing
(2) Interrupts during programming/erasing
Description amended
1. When flash memory is being programmed or erased,
both the user MAT and user boot MAT cannot be
accessed. Prepare the interrupt vector table and interrupt
processing routine in on-chip RAM or external memory.
Make sure the flash memory being programmed or erased
is not accessed by the interrupt processing routine. If flash
memory is read, the read values are not guaranteed. If .
flash memory that is being programmed or erased is
accessed, the error protect state is entered, and
programming or erasing is aborted. .
5. When a transition is made to sleep mode or software
standby mode in the interrupt processing routine, the error
protection state is entered and programming/erasing is
aborted.
23.8.3 Other Notes
893, 894
1. Download time of on-chip program
The programming program that includes the initialization
routine and the erasing program that includes the
initialization routine are each 2 kbytes or less. Accordingly,
when the CPU clock frequency is 40 MHz, the download
for each program takes approximately 75 μs at maximum.
5. When a transition is made to sleep mode in the
interrupt processing routine, the error protection state is
entered and programming/erasing is aborted.
24.8.3 Other Notes
Description amended
1. Download time of on-chip program
The programming program that includes the initialization
routine and the erasing program that includes the
initialization routine are each 3 Kbytes or less. Accordingly,
when the CPU clock frequency is 80 MHz, the download
for each program takes approximately 305 μs at maximum.
2. User branch processing intervals
The intervals for executing the user branch processing
differs in programming and erasing. The processing phase
also differs. Table 23.11 lists the maximum and minimum
intervals for initiating the user branch processing when the
CPU clock frequency is 40 MHz.
2. User branch processing intervals
The intervals for executing the user branch processing
differs in programming and erasing. The processing phase
also differs. Table 24.11 lists the minimum and maximum
user branch processing intervals when the CPU clock
frequency is 80 MHz.
Table 23.11 Initiation Intervals of User Branch Processing
Processing Name
Programming
Erasing
Maximum Interval
Approximately 1 ms
Approximately 5 ms
Minimum Interval
Approximately 17 μs
Approximately 17 μs
Table 24.11 User Branch Processing Intervals
Table and title amended
Processing Name
Programming
Erasing
Maximum Interval
Approximately 1 ms
Approximately 5 ms
Minimum Interval
Approximately 19 μs
Approximately 19 μs
However, when operation is done with CPU clock of 40
MHz, maximum and minimum values of the time until initial
user branch processing are as shown in table 23.12.
However, when operation is done with CPU clock of 80
MHz, maximum and minimum values of the time until initial
user branch processing are as shown in table 24.12.
Table 23.12 Initial User Branch Processing Time
Processing Name
Programming
Erasing
Max.
Approximately 113 μs
Approximately 85 μs
Min.
Approximately 113 μs
Approximately 45 μs
Table 24.12 Intervals Until Start of User Branch Processing
.
Table and title amended
Processing Name
Programming
Erasing
Max.
Approximately 500 μs
Approximately 2300 μs
Min.
Approximately 500 μs
Approximately 1000 μs
Rev.3.00 Mar. 12, 2008 Page xlvii of xc
REJ09B0177-0300