SH7059 Datasheet, PDF (266/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
Block Diagram of Channel 8: Figure 11.7 shows a block diagram of ATU-II channel 8.
Prescaler 1
TO8A
TO8B
•
•••
TO8O
TO8P
Clock selection
(2 systems:
A–H, I–P)
DCNT8A
DCNT8B
DCNT8C
DCNT8D
•••
•
DCNT8M
DCNT8N
DCNT8O
DCNT8P
RLDR8
TCNR
OTR
DSTR
TCR8
TSR8
TIER8
RLDENR
Control
logic
Compa-
rator
One-shot start
trigger (CH1, 2)
One-shot terminate
trigger (CH1, 2)
I/O control
Down-count
end interrupts
× 16 (OSI)
Internal data bus and address bus
Figure 11.7 Block Diagram of Channel 8
Rev.3.00 Mar. 12, 2008 Page 176 of 948
REJ09B0177-0300