SH7059 Datasheet, PDF (717/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

23.5 Port D
Port D is an input/output port with the 14 pins shown in figure 23.4.
23. I/O Ports (I/O)
Port D
PD13 (I/O) /PULS6 (output) / HTxD0 (output) /HTxD1 (output)
PD12 (I/O) /PULS4 (output)
PD11 (I/O) /PULS3 (output)
PD10 (I/O) /PULS2 (output)
PD9 (I/O) /PULS1 (output)
PD8 (I/O) /PULS0 (output)
PD7 (I/O) /TIO1H (I/O)
PD6 (I/O) /TIO1G (I/O)
PD5 (I/O) /TIO1F (I/O)
PD4 (I/O) /TIO1E (I/O)
PD3 (I/O) /TIO1D (I/O)
PD2 (I/O) /TIO1C (I/O)
PD1 (I/O) /TIO1B (I/O)
PD0 (I/O) /TIO1A (I/O)
Figure 23.4 Port D
23.5.1 Register Configuration
The port D register configuration is shown in table 23.7.
Table 23.7 Register Configuration
Name
Port D data register
Port D port register
Abbreviation
PDDR
PDPR
R/W
R/W
R
Initial Value
Address
H'0000
H'FFFFF746
Port D pin values H'FFFFF784
Access Size
8, 16
8, 16
23.5.2 Port D Data Register (PDDR)
Bit: 15
—
Initial value: 0
R/W: R
14
13
12
11
10
9
8
—
PD13 PD12 PD11 PD10 PD9 PD8
DR
DR
DR
DR
DR
DR
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
DR
DR
DR
DR
DR
DR
DR
DR
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port D data register (PDDR) is a 16-bit readable/writable register that stores port D data. Bits PD13DR to PD0DR
correspond to pins PD13/PULS6/HTxD0/HTxD1 to PD0/TIO1A.
Rev.3.00 Mar. 12, 2008 Page 627 of 948
REJ09B0177-0300