SH7059 Datasheet, PDF (48/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Differences between SH7058 and SH7058S/SH7059
SH7058 (Rev.3, REJ09B0046-0300H)
SH7058S/SH7059
23.8.3 Other Notes
894
4. State in which AUD operation is disabled and interrupts
are ignored
24.8.3 Other Notes
Description amended
4. State in which AUD operation is disabled and interrupts
are ignored
⎯ Checking the flash-memory related registers
immediately after user boot mode is initiated
(Approximately 100 μs if operation is done at an
internal frequency of 40 MHz after the reset signal is
released)
⎯ Checking the flash-memory related registers
immediately after user boot mode is initiated
(Approximately 100 μs if operation is done at an
internal frequency of 80 MHz after the reset signal is
released)
23.9 Programmer Mode
894
In programmer mode, set the mode pins as shown in table
23.13, and provide a 6-MHz input-clock signal.
23.9.1 Pin Arrangement of Socket Adapter
Figure 23.24 Mapping of On-Chip Flash Memory
895
On-chip ROM space (user MAT)
On-chip ROM space (user MAT) 1 Mbyte
Address in PROM mode
H'0,0000 to H'F,FFFF
7. FWE pin state
Newly added
24.9 Programmer Mode
Description amended
In programmer mode, set the mode pins as shown in table
24.13, and provide a 6-MHz input-clock signal. This
enables this LSI to operate at 48 MHz.
24.9.1 Pin Arrangement of Socket Adapter
Figure 24.24 Mapping of On-Chip Flash Memory
Figure amended
On-chip ROM space (user MAT)
On-chip ROM space (user MAT) 1 Mbyte
Address in PROM mode
H'00,0000 to H'0F,FFFF
On-chip ROM space (user boot MAT)
On-chip ROM space (user boot MAT) 8 kbytes
Address in MCU mode
H'0000,0000 to H'0000,1FFF
Address in PROM mode
H'0,0000 to H'0,1FFF
On-chip ROM space (user boot MAT)
On-chip ROM space (user boot MAT) 12 Kbytes
Address in MCU mode
H'0000,0000 to H'0000,2FFF
Address in PROM mode
H'0,0000 to H'0,2FFF
Rev.3.00 Mar. 12, 2008 Page xlviii of xc
REJ09B0177-0300