SH7059 Datasheet, PDF (352/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11. Advanced Timer Unit-II (ATU-II)
11.2.16 Down-Counters (DCNT)
The DCNT registers are 16-bit down-counters. The ATU-II has 16 DCNT counters in channel 8.
Channel
8
Abbreviation
DCNT8A, DCNT8B, DCNT8C, DCNT8D, DCNT8E, DCNT8F, DCNT8G, DCNT8H,
DCNT8I, DCNT8J, DCNT8K, DCNT8L, DCNT8M, DCNT8N, DCNT8O, DCNT8P
Function
16-bit down-counters
Down-Counters 8A to 8P (DCNT8A to DCNT8P): Down-counters 8A to 8P (DCNT8A to DCNT8P) are 16-bit
readable/writable registers that count on an input clock. The input clock is selected with prescaler register 1 (PSCR1) and
the timer control register (TCR).
Bit:
Bit name:
Initial value:
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
When the one-shot pulse function is used, DCNT8x starts counting down when the corresponding DSTR bit is set to 1 by
the user program after the DCNT8x value has been set. When the DCNT8x value underflows, DSTR and DCNT8x are
automatically cleared to 0, and the count is stopped. At the same time, the corresponding channel 8 timer status register 8
(TSR8) status flag is set to 1.
When the offset one-shot pulse function is used, on compare-match with a channel 1 or 2 general register (GR) or output
compare register (OCR) (the compare-match setting being made in the trigger mode register (TRGMDR) (for channel 1
only) ) when the corresponding timer connection register (TCNR) bit is 1, the corresponding down-count start register
(DSTR) bit is automatically set to 1 and the down-count is started. When the DCNT8x value underflows, the
corresponding DSTR bit and DCNT8x are automatically cleared to 0, the count is stopped, and the output is inverted, or, if
a one-shot terminate register (OTR) setting has been made to forcibly terminate output by means of a trigger, DSTR is
cleared to 0 by a channel 1 or 2 compare-match between GR and OCR, the count is forcibly terminated, and the output is
inverted. The output is inverted for whichever is first. When the output is inverted, the corresponding channel 8 TSR8
status flag is set to 1.
The DCNT8x counters can only be accessed by a word read or write.
The DCNT8x counters are initialized to H'0000 by a power-on reset, and in hardware standby mode and software standby
mode.
For details, see sections 11.3.5, One-Shot Pulse Function, and 11.3.6, Offset One-Shot Pulse Function and Output Cutoff
Function.
Rev.3.00 Mar. 12, 2008 Page 262 of 948
REJ09B0177-0300