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SH7059 Datasheet, PDF (540/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer
17. Controller Area Network-II (HCAN-II)
• TEC/REC
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0 REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
Initial Value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W*
Bit
Bit Name Initial Value R/W Description
15
TEC7
0
R/W* Transmit Error Counter
14
TEC6
0
13
TEC5
0
R/W* This register is incremented if an error is detected during transmission as
R/W* specified on the CAN specification (see CAN specification document).
12
TEC4
0
R/W*
11
TEC3
0
R/W*
10
TEC2
0
R/W*
9
TEC1
0
R/W*
8
TEC0
0
R/W*
7
REC7
0
R/W* Receive Error Counter
6
REC6
0
5
REC5
0
R/W* This register is incremented if an error is detected during reception as
R/W* specified on the CAN specification (see CAN specification document).
4
REC4
0
R/W*
3
REC3
0
R/W*
2
REC2
0
R/W*
1
REC1
0
R/W*
0
REC0
0
R/W*
Note: * It is only possible to write the value in test mode when MCR15 = MCR14 = 1.
Rev.3.00 Mar. 12, 2008 Page 450 of 948
REJ09B0177-0300