SH7059 Datasheet, PDF (657/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

21. Advanced User Debugger (AUD)
Pin Functions in Branch Trace Mode
Pin
AUDCK
AUDSYNC
AUDATA3 to
AUDATA0
Description
This pin outputs the peripheral module operating frequency (Pφ).
This is the clock for AUDATA synchronization.
This pin indicates whether output from AUDATA is valid.
High: Valid data is not being output
Low: An address is being output
1. When AUDSYNC is low
When a program branch or interrupt branch occurs, the AUD asserts AUDSYNC and
outputs the branch destination address. The output order is A3–A0, A7–A4, A11–A8,
A15–A12, A19–A16, A23–A20, A27–A24, A31–A28.
2. When AUDSYNC is high
When waiting for branch destination address output, these pins constantly output 0011.
When an branch occurs, AUDATA3–AUDATA2 output 10, and AUDATA1–AUDATA0
indicate whether a 4-, 8-, 16-, or 32-bit address is to be output by comparing the previous
fully output address with the address output this time (see table below).
AUDATA1, AUDATA0
00
Address bits A31–A4 match; 4 address bits A3–A0 are to be output
(i.e. output is performed once).
01
Address bits A31–A8 match; 8 address bits A3–A0 and A7–A4 are to
be output (i.e. output is performed twice).
10
Address bits A31–A16 match; 16 address bits A3–A0, A7–A4, A11–
A8, and A15–A12 are to be output (i.e. output is performed four
times).
11
None of the above cases applies; 32 address bits A3–A0, A7–A4,
A11–A8, and A15–A12, A19–A16, A23–A20, A27–A24, and A31–A28
are to be output (i.e. output is performed eight times).
Pin Functions in RAM Monitor Mode
Pin
AUDCK
AUDSYNC
AUDATA3 to
AUDATA0
Description
The external clock input pin. Input the clock to be used for debugging to this pin. The input
frequency must not exceed 1/8 of the internal operating frequency (φ). When no connection is
made, this pin is pulled up internally.
Do not assert this pin until a command is input to AUDATA from off-chip and the necessary
data can be prepared. See the protocol description for details. When no connection is made,
this pin is pulled up internally.
When a command is input from off-chip, data is output after Ready reception. Output starts
when AUDSYNC is negated. See the protocol description for details. When no connections
are made, these pins are pulled up internally.
Rev.3.00 Mar. 12, 2008 Page 567 of 948
REJ09B0177-0300