SH7059 Datasheet, PDF (435/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

14. Compare Match Timer (CMT)
Section 14 Compare Match Timer (CMT)
14.1 Overview
This LSI has an on-chip compare match timer (CMT) comprising two 16-bit timer channels. The CMT has 16-bit counters
and can generate interrupts at set intervals.
14.1.1 Features
The CMT has the following features:
• Four types of counter input clock can be selected
⎯ One of four internal clocks (Pφ/8, Pφ/32, Pφ/128, Pφ/512) can be selected independently for each channel.
• Interrupt sources
⎯ A compare match interrupt can be requested independently for each channel.
14.1.2 Block Diagram
Figure 14.1 shows a block diagram of the CMT.
CM10
Pφ/32 Pφ/512
Pφ/8 Pφ/128
CMI1
Pφ/32 Pφ/512
Pφ/8 Pφ/128
Control circuit
Clock selection
Control circuit
Clock selection
Module bus
Bus
interface
CMT
Legend:
CMSTR: Compare match timer start register
CMCSR: Compare match timer control/status register
CMCOR: Compare match timer constant register
CMCNT: Compare match timer counter
CMI: Compare match interrupt
Internal bus
Figure 14.1 CMT Block Diagram
Rev.3.00 Mar. 12, 2008 Page 345 of 948
REJ09B0177-0300