SH7059 Datasheet, PDF (56/1042 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Differences between SH7058 and SH7058S/SH7059
SH7058 (Rev.3, REJ09B0046-0300H)
23.7 Flash Memory Emulation in RAM
886
Figure 23.18 shows an example of an overlap on block
area EB0 of the flash memory.
SH7058S/SH7059
25.7 Flash Memory Emulation in RAM
Description amended
Figure 25.18 shows an example of an overlap on block
area EB0 to EB3 of the flash memory.
Emulation is possible for a single area selected from
among the eight areas, from EB0 to EB7, of the user MAT.
The area is selected by the setting of the RAM2 to RAM0
bits in RAMER.
(1) To overlap a part of the RAM on area EB0, to allow
realtime programming of the data for this area, set the
RAMS bit in RAMER to 1, and each of the RAM2 to RAM0
bits to 0.
(2) Realtime programming is carried out using the overlaid
area of RAM.
In programming or erasing the user MAT, it is necessary to
run a program that implements a series of procedural
steps, including the downloading of an on-chip program. In
this process, set the download area with FTDAR so that
the overlaid RAM area and the area where the on-chip
program is to be downloaded do not overlap. The initial
setting (H'00) of FTDAR causes the tuned data area to
overlap with the download area. When using the initial
setting of FTDAR, the data that is to be programmed must
be saved beforehand in an area that is not used by the
system.
Figure 23.19 shows an example of programming data that
has been emulated to the EB0 area in the user MAT.
Emulation is possible for four areas selected from among
the eight areas, from EB0 to EB7, of the user MAT. The
area is selected by the setting of the RAM0 bit in RAMER.
(1) To overlap a part of the RAM on area EB0 to EB3, to
allow realtime programming of the data for this area, set
the RAMS bit in RAMER to 1, and each of the RAM0 bit to
0.
(2) Realtime programming is carried out using the overlaid
area of RAM.
In programming or erasing the user MAT, it is necessary to
run a program that implements a series of procedural
steps, including the downloading of an on-chip program. In
this state, note that the RAM area overlaps with the area
where the on-chip program is downloaded. Prevent
destruction of the data once it has been safely written to
RAM by following either of the procedures below.
(1) Once the tuning data has been safely written to the four
areas used to emulate flash memory, secure the data in an
unused area.
(2) Write the tuning data to one of the four areas used to
emulate flash memory. In this case, use the FTDAR
register to select an area for downloading that does not
overlap with the area to be tuned.
Figure 25.19 shows an example in which the EB0 area is
selected for tuning from among the four areas used for
emulation, and the data, once safely written to RAM, is
then written to the EB0 area in the user MAT.
Rev.3.00 Mar. 12, 2008 Page lvi of xc
REJ09B0177-0300